adv7280 record problem

Hi,

  Sometimes the GStreamer pipeline just closed probably because of Sync (Hsync/Vsync) loss So please Make sure the input wave form is correct and the right amplitude.

Thanks,

Poornima

Hello PoornimaSubramani 

I also tried on ADV7280 eval board. It has same problem. I use just LLC and 8bit data from ADV7280 chip.

I do not connect SYNC pins(HS/VS). Because, in datasheet of ADV7280, it says that synchronization signal is embedded in 8bit data (attached photo).

Why Sync(Hsync/Vsync) has loss ? What's solution of this problem? Is this ADV7280 chips' general problem?

Thankss,

Hello PoornimaSubramani 

I also tried on ADV7280 eval board. It has same problem. I use just LLC and 8bit data from ADV7280 chip.

I do not connect SYNC pins(HS/VS). Because, in datasheet of ADV7280, it says that synchronization signal is embedded in 8bit data (attached photo).

Why Sync(Hsync/Vsync) has loss ? What's solution of this problem? Is this ADV7280 chips' general problem?

Thankss,

Hi,

   Could you please refer below thread,

     (+) ADV7842 LLC Phase Adjustment Test - Q&A - Video - EngineerZone (analog.com)

   Also let us know, Whether you can able to get the signals from Pixel port & LLC pins from ADV7280 part ?

Thanks,

Poornima

Hi PoornimaSubramani 

When I check the LLC and Data bits, I can get them.

Thanks,

Hi,

   Please let us know the SoC that you are interfacing with ADV7280 part ?

Thanks,

Poornima

Hello,

I'm using Zynq FPGA.

Hi,

 It Seems ADV7280 part is working properly as per your comment ("LLC and Data bits, I can get them")  and assuming are you using the software that comes with that reference design to configure the board at   https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms1-ebz/quickstart/zynq

  Please crosscheck your driver with https://github.com/analogdevicesinc/linux.git

  Git checkout xcomm_zynq

Thanks,

Poornima