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Analog Input on ADV7481

Category: Software
Software Version: Linux 5.10.72


We are using ADV7481 connected through MIPI-CSI2 to an NXP i.MX8 MPlus processor..

The ADV chip is confugured to use 2 video pipelines:

1) HDMI input with MIPI-CSI TXA output

2) VGA converted to YPbPr input with MIPI-CSI TXB output.

We managed to properly build linux v4l2 pipelines:

HDMI is working properly, but YPbPr has issue. Image is duplicated several times:

Something seems to be wrong with VGA input resolution. Can you please help us to properly configure ADV7481?

Best Regards,


  • Hi,

      Please refer the below script for YPrPb input to MIPI-CSI output & crosscheck your register configuration with referred script.

     ":04-01 Analog YPrPb to MIPI TX-B CSI 1-Lane - Autodetect YPrPb In, Ain 1,2,3 - MIPI Out:"



  • Hi Poornima,

    I followed mentioned script 04-01 Analog YPrPb to MIPI TX-B CSI 1-Lane - Autodetect YPrPb In, Ain 1,2,3 - MIPI Out:

    The resulting image posted was taken by using this script.

    I also tried to change several SDP registers to see if I can change the resulting image without success.

    The reading of SDP Status 1, 2 and 3 gives the values St1=0x09, St2=0x10, St3=0x00

    It seems that VSync is OK and HSync not.

    Can you tell me if HSync signal must have a minimum length ?



  • Hi,

       Could you please check with scope what does the V & H sync timing look like ?

     Please ensure with below possible problems,

        a) Layout/trace issues with board causing impedance problems

        b) Power supply noise problems especially with Pvdd

        c) Incorrect scripts being used

    Also it seems "INST_HLOCK" doesn't get lock when checking with status registers.
    Kindly note 'INST_HLOCK' is an instantaneous horizontal lock indicator, so it must be based on a line-to-line evaluation of the horizontal synchronization pulse of the incoming video, and is very likely to be faster than the IN_LOCK and LOST_LOCK status bits.
  • Hi,

    We made further tests with a pattern generator capable of producing different resolutions directly connected to ADV's YPrPb input.

    1) with PAL output (line length = 64 usec) we have the following correct image:

    2) with VGA-480 60Hz output (line length = 31.7 usec) we have almost doubled image:

    3) with XGA-1024-768 60Hz output (line length = 20.8 usec) we have almost trippled image:

    It seems that ADV 7481 can only capture input with line length 64 usec.

    Is there a way to configure different YPrPb input line length ?

    What is the highest input resolution supported ?

    We also measured HSYNC at ADV's input : The pulse amplitude is -200 mV, duration 4 usec.



  • Hi,

        ADV7481 is capable of decoding a large selection of baseband video signals in composite (both single-ended and differential), S-Video, and component formats in SDP core.

       So in SDP core we can processes only PAL,NTSC and SECAM signal types. The Video standards supported by the SDP include PAL , PAL 60 , PAL M, PAL N, PAL NC, NTSC M/J, NTSC 4.43, and SECAM.

     Could you please check the VGA and XGA formats in HDMI interface and let us know the result.