Incorrect TMDS clock frequency on ADV7481

Hi,

  For measuring the input format, We can use TMDS frequency and line lengths related registers. Please check & let us know.

  Also we can measure the pixel clock by using below formula and you can get the Sync related parameters in VESA document.

     Pixel clock= Horizontal total pixels * Vertical total pixels * vertical frequency

TMDSFREQ[8:0], Addr 68 (HDMI), Address 0x51[7:0]; Address 0x52[7] (Read Only)

TMDSFREQ_FRAC[6:0], Addr 68 (HDMI), Address 0x52[6:0] (Read Only)

TOTAL_LINE_WIDTH[13:0], Addr 68 (HDMI), Address 0x1E[5:0]; Address 0x1F[7:0] (Read Only)

LINE_WIDTH[12:0], Addr 68 (HDMI), Address 0x07[4:0]; Address 0x08[7:0] (Read Only)

FIELD0_TOTAL_HEIGHT[13:0], Addr 68 (HDMI), Address 0x26[5:0]; Address 0x27[7:0] (Read Only)

FIELD0_HEIGHT[12:0], Addr 68 (HDMI), Address 0x09[4:0]; Address 0x0A[7:0] (Read Only)

Please refer this thread ADV7611 HDMI clk Measurement - Q&A - Video - EngineerZone (analog.com)

Thanks,

Poornima

     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 08 00 00 18 23 b0 5c e5 00 02 d0 42 d0 04 8f 00    ?..?#?\?.??B???.
10: 25 7d 02 7f 3f ff ff 60 31 00 80 18 09 00 06 72    %}???..`1.???.?r
20: 00 6e 00 28 00 dc 05 dc 05 dc 00 0a 00 0a 00 0a    .n.(.?????.?.?.?
30: 00 0a 00 28 00 28 00 00 08 02 0b f8 02 10 7b 5e    .?.(.(..??????{^
40: 00 40 17 0f 45 00 0f 00 00 00 00 00 44 3c fe 18    .@??E.?.....D<??
50: 00 2e 69 03 00 00 58 a3 04 a3 00 16 a8 c0 18 00    ..i?..X???.????.
60: 0f 00 00 00 00 00 00 00 00 00 00 00 01 00 04 40    ?...........?.?@
70: 00 00 04 00 00 00 00 00 43 00 00 00 00 00 00 00    ..?.....C.......
80: 00 00 00 fe 00 10 9b 04 03 00 a3 08 00 08 00 08    ...?.????.??.?.?
90: 00 00 08 00 00 00 51 80 ff a3 00 0a 08 40 00 00    ..?...Q?.?.??@..
a0: 00 07 00 01 16 16 16 00 00 f0 00 f0 00 f0 00 00    .?.????..?.?.?..
b0: 00 00 00 00 00 00 00 00 00 00 02 00 00 01 00 00    ..........?..?..
c0: ff 00 00 00 00 00 00 00 00 00 00 09 00 00 00 00    ...........?....
d0: 00 00 01 00 00 00 05 00 00 00 00 01 01 00 00 00    ..?...?....??...
e0: 2e 00 00 00 00 00 00 00 00 00 00 01 00 00 00 82    ...........?...?
f0: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 06 66    ........?.....?f

     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 08 00 00 18 23 b0 4a a5 00 02 d0 02 d0 04 8f 00    ?..?#?J?.??????.
10: 25 7d 02 7f 3f ff ff 20 71 00 80 18 0a 00 06 72    %}???.. q.???.?r
20: 00 6e 00 28 00 dc 05 dc 05 dc 00 0a 00 0a 00 0a    .n.(.?????.?.?.?
30: 00 0a 00 28 00 28 00 00 00 00 00 10 02 10 7b 5e    .?.(.(.....???{^
40: 00 40 17 0f 45 00 0f 00 00 00 00 00 44 3c fe 18    .@??E.?.....D<??
50: 00 25 21 00 00 00 58 a3 04 a3 00 12 20 e0 18 00    .%!...X???.? ??.
60: 1f 00 00 00 00 00 00 00 00 00 00 00 01 00 04 40    ?...........?.?@
70: 00 00 04 00 00 00 00 00 43 00 00 00 00 00 00 00    ..?.....C.......
80: 00 00 00 fe 00 10 9b 04 09 00 a3 08 00 08 00 08    ...?.????.??.?.?
90: 00 00 08 00 00 00 51 80 ff a3 00 0a 08 40 00 00    ..?...Q?.?.??@..
a0: 00 07 00 01 16 16 16 00 00 f0 00 f0 00 f0 00 00    .?.????..?.?.?..
b0: 00 00 00 00 00 00 00 00 00 00 02 00 00 01 00 00    ..........?..?..
c0: ff 00 00 00 00 00 00 00 00 00 00 09 00 00 00 00    ...........?....
d0: 00 00 01 00 00 00 04 00 00 00 00 01 01 00 00 00    ..?...?....??...
e0: 25 00 00 00 00 00 00 00 00 00 00 01 00 00 00 82    %..........?...?
f0: 00 00 00 00 00 00 00 00 01 00 00 00 00 00 05 55    ........?.....?U

I have attached dumps of the HDMI registers when receiving 720p60 from two different video sources. 

In both cases, registers 0x1e and 0x1f give 06 72, so the horizontal total is 1650

In both cases, registers 0x26 and 0x27 give 05 dc, so the vertical total is 750

1650 * 750 * 60 = 74250000.

Therefore, I should be seeing a 74.25MHz clock in both cases.

In the first case, registers 0x51 and 0x52 give 2e 69, which gives 46.82MHz

In the second, registers 0x51 and 0x52 give 25 21, which gives 37.26MHz

Why am I not seeing 74.25MHz in registers 0x51 and 0x52?

You mention that I can use the framerate; how do I obtain this value from the ADV7481?  I have not been able to find a register in the documentation that provides this information.

Hi,

  Could you please check with below register for frame rate - CP_V_FREQ[2:0] (This signal selects the vertical frequency for the video through the CP ).

  Also meanwhile we will check the "0x51 and 0x52" TMDS freq registers.

Thanks,

Poornima

I have tried feeding a 720p60 and 720p50 signal into the chip and in both cases, IO map register 0x03 reads 0x86; bits [6:4] are zero, which indicates 60Hz.  Therefore, this register does not detect the incoming vertical frequency.

I have worked out that the top bit of register 0x52 is the LSB, not the MSB of the integer component of the TMDS frequency; as such, the value from the laptop is 74.2578125MHz, which is what I would expect.  However, by the same correction, the signal generator is showing a pixel clock of 92.8203125MHz.

By my calculations, this is 1.25x the expected 74.25MHz clock value, or multiplied by 10/8.  Could this be related to colour depth?