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ADV7125 : Voltage Level query



		

			

									
					    GHM_25
					
							

			
				
									
											
			
			
				
    
			
			
			    	
			                    
                
				                on Jun 22, 2022 
				
			
			
		
    

				
		
    
		    		    
		    
		    		            		        
    Category: Hardware
    
    		        		            		    
    Product Number:  ADV7125 
    
    		        		    		    	
			
    Hello Analog Team 
    

    We have some query regarding ADV7125 chip to implement in our solution 
    

    Requirement : VGA Output 
    

    1) VGA Output of 1024x728 -60HZ 
    

    2) Voltage Level - RED - (-0.3 V – 0.7 V)
    

                                 Blue - (-0.3 V – 0.7 V)
    

                                 Green - (-0.3 V – 0.7 V)
    

                                HSYNC - 0 V – 5.0 V - TTL Logic 
    

                               VSYNC - 0 V – 5.0 V - TTL Logic
    

    3) Digital RGB - 24 bit
    

    Selected Solution - ADV7125BCPZ170 , Chip for RGB analog output and HSYNC and VSYNC lines directly from FPGA to VGA connector
    

    Queries : 
    

    1)  our Requirement is Single ended VGA output, complementary IOG,IOB,IOR connected with ground, is our understanding correct ? 
    

    2) As per datasheet , during sync mode
    

     
    

    How to shift the voltage level of sync to -0.3 and white to 0.7V ?
    

    3) When using external sync , HSYNC and VSYNC , how much delay need to add to sync with input clock of ADV7125?
    

    
								
    

				
				
		
    
			
						
									
									
						
						
			
			
			
			
		
    

        
        

					
    
			
    


    


	















    
	
    
	
    
					



			








	
	
	
	



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													+1
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      •  Super User  
      
            
			                            
                        
                on Jun 22, 2022 1:34 PM
            
            
					
      
	
      

		
		
      
					
      1) Correct
      

      2) The bottom of the sync pulse will go all the way to ground.  To truly go to -0.3V you would have to AC couple the output which would use rather large caps.  Normally the video decoders inputs are high impedance and already have a AC blocking so they are feed the exact signal per your image above.    As a reference check our the ADV7181D, https://www.analog.com/en/products/adv7181d.html, datasheet and look at the reference schematic.  This is how all video decodes inputs are implemented
      

      3) I known of no timing requirements between the pixel clock and the sync edges.  VGA only needs the analog video signals.
      

      BTW: for VGA the analog video channels don't need the sync pulse since sync timing is carried by the sync pulses.  It's doesn't hurt anything for it to be there.  The sync pulse is needed for composite video (CVBS).
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
						
						
				
				
		
		
      
			
		
      
	
      

      

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													+1
							
			
				
									
							        
			
			
			
      •  Analog Employees  
      •  Super User  
      
            
			                            
                        
                on Jun 22, 2022 1:34 PM
            
            
					
      
	
      

		
		
      
					
      1) Correct
      

      2) The bottom of the sync pulse will go all the way to ground.  To truly go to -0.3V you would have to AC couple the output which would use rather large caps.  Normally the video decoders inputs are high impedance and already have a AC blocking so they are feed the exact signal per your image above.    As a reference check our the ADV7181D, https://www.analog.com/en/products/adv7181d.html, datasheet and look at the reference schematic.  This is how all video decodes inputs are implemented
      

      3) I known of no timing requirements between the pixel clock and the sync edges.  VGA only needs the analog video signals.
      

      BTW: for VGA the analog video channels don't need the sync pulse since sync timing is carried by the sync pulses.  It's doesn't hurt anything for it to be there.  The sync pulse is needed for composite video (CVBS).
      
			
      

		
		
		
		
	
      
	
      
		
      
			
		
      
	
      
	
      
		
						
				
						
						
				
				
		
		
      
			
		
      
	
      

      

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