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Issues we are having with the ADV7125

The original design was developed with the AD9701 DAC ECL input design with -5.2 V supply, the re-spin utilizes the ADV7125 DAC TTL input design with +5 V supply as the replacement. The issue we have encountered is the Video Waveform output for the original design the Blanking level is 0.0V and for the new design the Blanking level is 0.4V. In the original design ADI recommend to incorporate an op-amp circuit to invert the signal to compensate for the 0.4 V offset. Unfortunately the design has created undesirable effects on the output signals labelled DAC GAIN and PIXEL OFFSET CORRECTION and they don’t meet the current signal specifications. Also the original designer is no longer with us so we are at a disadvantage there. This is a major concern we built five assemblies with the thought of going into production once we fully evaluated the system, but if we need to re-spin the design again this will be an even greater concern.

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  • Looking at your schematics (old design vs. new design) where new design is using the ADV7125 and the old design used the AD9701: the following I can deduce based on the probe points referred to as pixel offset correction and pixel gain correction.

    AD9701:

    10% BRIGHT = SETUP = connected to logic 0

    REF_WHITE = COMP_SYNC = COMP_BLANK = connected to logic 1

    With the above connections as is specified in the AD9701 data sheet, you get -0.6375 V at the analog  output (pin 13). see attachment AD9701_Capture.PNG.

    I believe that you measure -0.6375 V at the probe points in the old design. See attachment Probe_Point_Capture.PNG.

    ADV7125:

    In your new design, it is migration from old using the ADV7125 and I believe that you want to achieve the same voltage measurements as was in the old design? In your new design a 75 R load is being driven at IOG and IOB (pins 32 and 28 respectively). In the ADV7125, RSET resistor 1.37K is used to output a current using the equation in the data sheet: where current = (7989.9 * VRef/RSET), VRef = 1.235 V. This current calculated is around 7.2mA.

    The output current at IOB develops a voltage across the 75 R load as 7.2mA * 75 = 0.54 V. This voltage of 0.54 V in new design is not -0.6375 V in the old design. You need a circuit to provide gain (-0.6375/0.54) = 1.180 to achieve old design using new design. The 2 AD827 OP_AMPS are providing this means with the help of the feedback resistor R1122 (1.18K) and the input resistor R1121(1.0K) on the path of the inverting input to the AD827.

    You are not driving a 75 R video cable beyond the AD827 other than providing a means to drive other circuitry in your design to satisfy your old design. Is this a fair assumption?

     

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  • Looking at your schematics (old design vs. new design) where new design is using the ADV7125 and the old design used the AD9701: the following I can deduce based on the probe points referred to as pixel offset correction and pixel gain correction.

    AD9701:

    10% BRIGHT = SETUP = connected to logic 0

    REF_WHITE = COMP_SYNC = COMP_BLANK = connected to logic 1

    With the above connections as is specified in the AD9701 data sheet, you get -0.6375 V at the analog  output (pin 13). see attachment AD9701_Capture.PNG.

    I believe that you measure -0.6375 V at the probe points in the old design. See attachment Probe_Point_Capture.PNG.

    ADV7125:

    In your new design, it is migration from old using the ADV7125 and I believe that you want to achieve the same voltage measurements as was in the old design? In your new design a 75 R load is being driven at IOG and IOB (pins 32 and 28 respectively). In the ADV7125, RSET resistor 1.37K is used to output a current using the equation in the data sheet: where current = (7989.9 * VRef/RSET), VRef = 1.235 V. This current calculated is around 7.2mA.

    The output current at IOB develops a voltage across the 75 R load as 7.2mA * 75 = 0.54 V. This voltage of 0.54 V in new design is not -0.6375 V in the old design. You need a circuit to provide gain (-0.6375/0.54) = 1.180 to achieve old design using new design. The 2 AD827 OP_AMPS are providing this means with the help of the feedback resistor R1122 (1.18K) and the input resistor R1121(1.0K) on the path of the inverting input to the AD827.

    You are not driving a 75 R video cable beyond the AD827 other than providing a means to drive other circuitry in your design to satisfy your old design. Is this a fair assumption?

     

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