Hi, my name is DFjkz1982.
We are using AD9398K STZ-100 with DVI IF.
We are currently evaluating DVI cables.
For AD9398KSTZ-100, the regulation of Channel to Channel Differential Input Skew is not listed.
Depending on the cable, the value of the differential channel-to-channel Skew of the TMDS input signal of the AD9398KSTZ-100 will differ.
According to the DVI-1.0 specification Table 4-7, it is described as Allowable Inter-Pair Skew at receiver Connector 0.6T pixel.
Our operating environment is
Frequency 73MHz
Resolution 1280 * 800.
What we want to know;
No 1: Is Channel to Channel Differential Input Skew 0.6Tpixel = 8.2ns@73MHz at AD9398K STZ-100?
(@ 73MHz ； 0.6Tpixel = 0.6Clock = 0.6 * 13.7ns = 8.2ns)
No 2: Does the Skew measurement method match the following?
(1) Clock rise 0V trigger
(2) Time from the trigger point to the data cross point
No 3: If No.2 is different, do you agree with the following?
(1) Clock rise 0V trigger
(2) Time from trigger point to ± 75 mV point of Data
＊No.3 measurement is worse than No.2
No 4: Our measurement result is about 400ps when it is No.3.
As in the provisions of No1, if it is 0.6Tpixel, I think that there is no problem, but is it correct?
See attached below,
A, DVI_specs_and_measurement result.pdf
B, DVI-1.0_specs.pdf
/cfs-file/__key/communityserver-discussions-components-files/331/DVI_2D00_1.0_5F00_specs.pdf
Edit Notes
We made it correct because the description of Question No. 3 was incorrect. Attached file A is also replaced along with the above.[edited by: DFjkz1982 at 5:07 AM (GMT -4) on 6 Jun 2022]
