I have the EVAL-ADV7393 eval board, and I need to provide the inputs to the EVAL-ADV7393 from a Xilinx ZCU102 development board via 1 of the 2 HPC FMC connectors. The inputs to the EVAL-ADV7393 eval board are provided over P1, whose pinout is shown below (taken from the EVAL-ADV7393 schematic):
The 24 digital I/O signals (e.g. SFL, ALSB, I2C Bus, HSYNC, VSYNC, P[0:15], RESET#, CLKIN) are pretty straightforward. But I need help figuring out how to provide the four power supplies to the ADV7393:
Note that the 24 digital I/O signals will be 1.8V since the ZCU102 HPC FMC signals come from ZYNQ Programmable Logic I/O banks with a maximum voltage level of 1.8V. So the VDD_IO input to the ADV7393 needs to be 1.8V.
My thought was to tie VAA to +3.3V that comes over the HPC FMC connector and tie the other three power supply inputs to the ADV7393 (i.e. VDD, VDD_IO, and PVDD) to +VADJ that comes over the HPC FMC connector. (And of course, I would set +VADJ on the ZCU102 to +1.8V.)
According to the VITA 57.1 Specification, the +3.3V lines can carry up to 3 Amps and the +VADJ lines can carry up to 4 Amps, so I don't think there is any issue here. My main concern is that the ADV7393 Datasheet recommends each of the four power supplies to be provided by a separate regulated supply:
Would there be any issues tying VDD, VDD_IO, and PVDD to the same +VADJ power rail from the ZCU102?