Register Configuration of ADV7403 for RGsB Input and RGB output

Hi,

we have the following requirements for ADV7403:

I/P Video - RGsB ( RGB with Sync On Green) as Input to the Chip.

1)720x576i @ 50/25Hz Interlaced video input,RGsB

2)720x480i @ 60/30Hz Interlaced video input,RGsB

O/P Video -720x576p and 720x480p RGB as output from the chip.

Then we capture the digital data in the FPGA for further processing.

Hardware Connections:
We have custom hardware with ADV7403 chip whose input channel configuration for RGsB is given below

Ain1 - G and SOG
Ain2 - B
Ain3 - R

We are using Portta HDMI Converter Up-Scaler AV to get the interlaced video. The link for the above converter is given below
https://www.amazon.in/Portta-Composite-S-Video-Converter-support/dp/B003NS0UUQ?th=1

The interlaced video is then connected to CVBS to RGsB converter and the link for the connector is given below
https://www.amazon.com/S-Video-Component-Format-Converter-Green/dp/B01LX0GSMK

The converted video is then provided as input to the ADV7403 chipset.

We have tried with the script on Page 318 of ADV7403 Datasheet Manual - "1080i 60Hz 1920x1080 RGB Input through AIN 1, 2 and 3 - 30-Bit 444 YPbPr Output" without configuring the CSC related register configuration, as mentioned below.

0x05, 0x01 - PRIM_MODE = 001b COMP
0x06, 0x02 - VID_STD = 0010 525i
0x1D, 0X47 - Enable 28.63636MHz crystal
0X3A, 0X21 - Set Latch Clock settings to 010b, power down ADC3
0X3B, 0X80 - Enable External Bias
0X3C, 0X5D - PLL_QPUMP to 101b
0X73, 0XD0 - Enable Manual Gain and set CH_A gain
0x74, 0x04 - Set CH_A and CH_B Gain
0x75, 0x01 - Set CH_B and CH_C Gain
0x76, 0x00 - Set CH_C Gain
0x7B, 0x1C - Turn off EAV and SAV codes
0x85, 0x18 - Enable SOG
0x86, 0x0B - Enable STDI Line Count Mode
0xC3, 0x31 - Set up ADC0 to 0001b, set up ADC1 to 0011b
0xC4, 0xC2 - Set ADC_MAN, set up ADC2 to 0010b
0x0E, 0x80 - ADI recommended sequence
0x52, 0x46 - ADI recommended sequence
0x54, 0x00 - ADI recommended sequence
0x0E, 0x00 - ADI recommended sequence

We are observing junk data from the chip with the above register configuration.

Could you please review the above script and suggest the script to get the above-mentioned input and output resolutions?

Waiting for a quick response since it is very critical for us to proceed further.

Thank you.