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ADV7280A pixel wraparound issue

Hello,

I'm running the following scripts (the examples from Analog Devices as is) on the ADV7280A, and seeing a pixel wraparound issue. The last pixel value of the previous row is shifted to the first pixel of the next row, so I see a thin vertical column (from the rightmost of the image) at the leftmost.

##CVBS INTERLACED TO PROGRESSIVE##
:I2P - NTSC In Ain1,YPrPb Out (480p EAV/SAV):
delay 10 ;
42 0F 00 ; Exit Power Down Mode [ADV7280 writes begin]
42 00 00 ; CVBS in on AIN1
42 0E 80 ; ADI Required Write
42 9C 00 ; ADI Required Write
42 9C FF ; ADI Required Write
42 0E 00 ; Enter User Sub Map
42 03 0C ; Enable Pixel & Sync output drivers
42 04 07 ; Power-up INTRQ, HS & VS pads
42 13 00 ; Enable INTRQ output driver
42 17 41 ; Enable SH1
42 1D 40 ; Enable LLC output driver
42 52 CD ; ADI Required Write
42 80 51 ; ADI Required Write
42 81 51 ; ADI Required Write
42 82 68 ; ADI Required Write
42 FD 84 ; Set VPP Map
84 A3 00 ; ADI Required Write [ADV7280 VPP writes begin]
84 5B 00 ; Enable Advanced Timing Mode
84 55 80 ; Enable the Deinterlacer for I2P [All ADV7280 writes finished]
56 17 02 ; Software Reset [Encoder writes begin]
56 00 9C ; Power up DAC's and PLL
56 01 70 ; ED at 54MHz input
56 30 04 ; 525p at 59.94 Hz with Embedded Timing
56 31 01 ; Pixel Data Valid [Encoder Writes finished]
End.

* 4774.ADV7280_5F00_CUST_2D00_VER.4.5.txt.zip (https://ez.analog.com/cfs-file/__key/communityserver-wikis-components-files/00-00-00-01-10/4774.ADV7280_5F00_CUST_2D00_VER.4.5.txt.zip)

Can anyone help on this what could cause this behavior with the example scripts?

Thanks for your help in advance.

  • Hi,

      By default the ADV728x video decoders receive analog video and output digital video in accordance with the ITU-R BT.656-3 standard.
      If the receiver system is expecting an ITU-R BT.656-4 output from the ADV728x then this can result in 10 lines of black video being output at the top of the screen.
      This generally occurs with NTSC CVBS video inputs but not with PAL CVBS inputs. This is because of difference in the blanking timing between the ITU-R BT.656-3 and ITU-R BT.656-4 standards for digitized NTSC.
     Setting User Map, Address 0x04[7] to 1 will program the ADV728x to output video in accordance with the ITU-R BT.656-4 standard. Hopefully this should solve your issue.
    The ADV728x hardware manual is currently being updated with this information.

     Please refer here https://ez.analog.com/video/f/q-a/8693/adv7280-ntsc-i2p-issue/9969#9969

    Thanks,

    Poornima