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ADV7610 960p color issue

Hello,

I don't have one of your evaluation boards and I am using the following set up: 

LAPTOP -> ADV7610 -> FPGA -> ADV7511 -> MONITOR

The configuration of the ADV7610 is shown at the end of the post.

I am trying to show on the monitor different video resolutions coming from my laptop, namely 1080p60Hz, 720p60Hz and 960p60Hz (all VESA). I configured the EDID properly and set PRIM_MODE and VID_STD to 0x06 and 0x02 respectively. The first two resolutions work, but not the last one (960p60Hz), which gives strange dark colors and sometimes dark bands on the monitor. Please see the image in attachment. Observe that the black part should be all green as the first lines at the top of the monitor, while the violet one should be white.

Do you have any suggestion on how to solve this issue?

Thank you in advance for your help,

Mattia

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ADV7610 I2C configuration

Please observe that traditional maps addresses are divided by 2 to make them compatible with Xilinx Microblaze I2C routines.

		// IO Map
		{0x4C, 0xFF, 0x80}, // I2C reset
		{0x4C, 0xF4, 0x80}, // Programmable I2C slave address for CEC map
		{0x4C, 0xF5, 0x7C}, // Programmable I2C slave address for Infoframe map
		{0x4C, 0xF8, 0x4C}, // Programmable I2C slave address for DPLL map (careful since only apparently same IO Map address)
		{0x4C, 0xF9, 0x64}, // Programmable I2C slave address for KSV map
		{0x4C, 0xFA, 0x6C}, // Programmable I2C slave address for EDID map
		{0x4C, 0xFB, 0x68}, // Programmable I2C slave address for HDMI map
		{0x4C, 0xFD, 0x44}, // Programmable I2C slave address for CP map

		{0x4C, 0x00, 0x02}, // Sets input video standard (default value)

		{0x4C, 0x01, 0x06}, // Vertical frequency 60Hz, primary mode HDMI-GR (graphics)

		{0x4C, 0x02, 0xF2}, // Auto CSC mode, no conversion, full 0 to 255 output range, RGB color space output, data saturator disabled

		{0x4C, 0x03, 0x40}, // Data format and pixel bus configuration: 24-bit SDR 4:4:4 mode

		{0x4C, 0x04, 0x62}, // Default pixel pins configuration (P[23:16] R, P[15:8] G, P[7:0] B) and XTAL frequency selection (28.63636 MHz)

		{0x4C, 0x05, 0x28}, // DE output selected, blank data during blanking periods, AV codes off

		{0x4C, 0x06, 0xA2}, // VSYNC output selected, negative DE polarity, negative VSYNC polarity, positive HSYNC polarity, do not invert LLC

		{0x4C, 0x0B, 0x44}, // Power up CP, digital sections of HDMI block, and XTAL buffer to the digital core
		{0x4C, 0x0C, 0x42}, // Chip is operational, power save mode disabled, powers up CP core clock, and digital output pins pads
		{0x4C, 0x14, 0x7F}, // Set max drive strength for output data, LLC, HSYNC, VSYNC, and DE
		{0x4C, 0x15, 0x80}, // Disable tristate of pins

		{0x4C, 0x19, 0x83}, // Enable LLC DLL
		{0x4C, 0x33, 0x40}, // Muxes the DLL output on LLC output


		// CP Map (0x22 is the 7-bit address equivalent of 0x44.
		//         This is due to an endianness conflict between ADV7610 and the Microblaze routines.)
		{0x22, 0x91, 0x00}, // Progressive video mode

		{0x22, 0xBA, 0x00},   // Disable HDMI free run

		{0x22, 0xC9, 0x2D},   // Disable buffering of timing parameters used for free run in HDMI mode
		{0x22, 0xF2, 0x04},   // Enable CRC checking


		// KSV (Repeater) Map (0x32 is the 7-bit address equivalent of 0x64)
		{0x32, 0x40, 0x81}, // Disable HDCP 1.1 features


		// HDMI Map (0x34 is the 7-bit address equivalent of 0x68)
		{0x34, 0x00, 0x00}, // I2C address for HDCP port is 0x74, set HDMI input Port A
		{0x34, 0x83, 0xFE}, // Enable clock termination on port A
		{0x34, 0x8D, 0x04}, // LF gain equalizer settings
		{0x34, 0x8E, 0x1E}, // HF gain equalizer settings
		{0x34, 0x1A, 0x8A}, // Discard audio sample packets with invalid parity bit, unmute audio
		{0x34, 0x96, 0x01}, // Enable HDMI Equalizer Dynamic Control
		// ADI recommends that these register settings are programmed to setup the ADV7610 correctly in HDMI mode
		{0x34, 0x9B, 0x03}, // ADI recommended setting
		{0x34, 0x6F, 0x08}, // ADI recommended setting
		{0x34, 0x85, 0x1F}, // ADI recommended setting
		{0x34, 0x87, 0x70}, // ADI recommended setting
		{0x34, 0x57, 0xDA}, // ADI recommended setting
		{0x34, 0x58, 0x01}, // ADI recommended setting
		// For non-fast switching applications, the following settings are recommended
		{0x34, 0xC1, 0x01}, // ADI recommended setting
		{0x34, 0xC2, 0x01}, // ADI recommended setting
		{0x34, 0xC3, 0x01}, // ADI recommended setting
		{0x34, 0xC4, 0x01}, // ADI recommended setting
		{0x34, 0xC5, 0x01}, // ADI recommended setting
		{0x34, 0xC6, 0x01}, // ADI recommended setting
		{0x34, 0xC7, 0x01}, // ADI recommended setting
		{0x34, 0xC8, 0x01}, // ADI recommended setting
		{0x34, 0xC9, 0x01}, // ADI recommended setting
		{0x34, 0xCA, 0x01}, // ADI recommended setting
		{0x34, 0xCB, 0x01}, // ADI recommended setting
		{0x34, 0xCC, 0x01}, // ADI recommended setting
		{0x34, 0x75, 0x10}, // DDC drive strength


		// KSV (Repeater) Map
		{0x32, 0x74, 0x00}, // Disable internal EDID for port A

// EDID Map
...

		// KSV (Repeater) Map
		{0x32, 0x74, 0x01}, // Enable internal EDID for port A

		{0x34, 0x6C, 0xA3} // Manual HPA enable (set high by default)
 
Parents
  • In order to narrow down the problem, I inform you that instead of a laptop we tried with a video pattern generator providing a video @ 960p60Hz (VESA compliant) and the same problem occurs. The issue must really be with the ADV7610, since if we plug the video pattern generator directly to a monitor the correct video is shown. Moreover, observe that we are checking the signals coming out of the ADV7610 thanks to a logic analyzer inside the FPGA, and we indeed see "corrupted" (dark) pixel values. 

    Is 960p (i.e. 1280x960) a too specific format for the ADV7610 to handle?

    Thanks again in advance,

    Mattia

  • Hi,

      Here we have validated the 1280x960@60Hz format using ADV7610 eval board by using '804B' generator as an source but here we could able to get the proper video output. Please refer below snap for your reference.

      Kindly let us know your source device

     

    Please note Generally FPGA clock outputs are not very stable or accurate.  This may also cause an color distortion  

    To avoid pink issue, Please try with below settings,

    It might be the chance of getting the pink color video output when the clamp setting  are CLAMP_MAN = 0, CLAMP_A=0, So please try with below CLAMP configuration and let us know the result.

    CP: CLMP_A_MAN = 1   

    OR

    CP: CLMP_MAN = 0, CLMP_A = 2047

    Also if the output seems pink issue which might be related to CSC, So try to adjust manually and refer with reference script. And also try to adjust color control register.

    Thanks,

    Poornima

  • Hi Poornima,

    First of all thank you as usual for your support.

    Here we have validated the 1280x960@60Hz format using ADV7610 eval board

    Could you please share with me the configuration script you have used? In this way i can cross-check it with mine.

      Kindly let us know your source device

    As source device we tried both a laptop and a video pattern generator coming from another FPGA board.

    Please note Generally FPGA clock outputs are not very stable or accurate.

    Unfortunately I don't think it is the case, since I see color distortion already inside the FPGA when analyzing the signals coming from the ADV7610 through an integrated logic analyzer.

    To avoid pink issue, Please try with below settings,

    I will try what you suggested and let you know.

    Thanks,

    Mattia

  • Hi,

      Please find the below comment, 

    Here we have validated the 1280x960@60Hz format using ADV7610 eval board.

    Could you please share with me the configuration script you have used? In this way i can cross-check it with mine.

        Here we have validated our eval board with software but not with script.

        For 1280x960@60 fps, Select a script which is close to same pixel clock frequency & make sure to turn off free run to begin with. 

      Please note ADV7610 can support non standard support as long as the pixel clock is not exceeding the 165 MHz and to use a non-standard format, configure the device with a script file where the clock is close to the pixel rate of your custom format.   

       Please provide your register settings and here we will try using our eval board.

    Thanks,

    Poornima

Reply
  • Hi,

      Please find the below comment, 

    Here we have validated the 1280x960@60Hz format using ADV7610 eval board.

    Could you please share with me the configuration script you have used? In this way i can cross-check it with mine.

        Here we have validated our eval board with software but not with script.

        For 1280x960@60 fps, Select a script which is close to same pixel clock frequency & make sure to turn off free run to begin with. 

      Please note ADV7610 can support non standard support as long as the pixel clock is not exceeding the 165 MHz and to use a non-standard format, configure the device with a script file where the clock is close to the pixel rate of your custom format.   

       Please provide your register settings and here we will try using our eval board.

    Thanks,

    Poornima

Children
  • Hi,

     For 1280x960@60 fps, Select a script which is close to same pixel clock frequency & make sure to turn off free run to begin with. 

      Please note ADV7610 can support non standard support as long as the pixel clock is not exceeding the 165 MHz and to use a non-standard format, configure the device with a script file where the clock is close to the pixel rate of your custom format.

    Indeed I am aware of this and I already followed this guidelines in my script.

    Please provide your register settings and here we will try using our eval board.

    Below you can find my register setting for the ADV7610. Thank you in advance.

    		// IO Map
    		{0x98, 0xFF, 0x80}, // I2C reset
    		{0x98, 0xF4, 0x80}, // Programmable I2C slave address for CEC map
    		{0x98, 0xF5, 0x7C}, // Programmable I2C slave address for Infoframe map
    		{0x98, 0xF8, 0x4C}, // Programmable I2C slave address for DPLL map (careful since only apparently same IO Map address)
    		{0x98, 0xF9, 0x64}, // Programmable I2C slave address for KSV map
    		{0x98, 0xFA, 0x6C}, // Programmable I2C slave address for EDID map
    		{0x98, 0xFB, 0x68}, // Programmable I2C slave address for HDMI map
    		{0x98, 0xFD, 0x44}, // Programmable I2C slave address for CP map
    		{0x98, 0x00, 0x02}, // Sets input video standard (default value)
    		{0x98, 0x01, 0x06}, // Vertical frequency 60Hz, primary mode HDMI-GR (graphics)
    		{0x98, 0x02, 0xF2}, // Auto CSC mode, no conversion, full 0 to 255 output range, RGB color space output, data saturator disabled
    		{0x98, 0x03, 0x40}, // Data format and pixel bus configuration: 24-bit SDR 4:4:4 mode
    		{0x98, 0x04, 0x62}, // Default pixel pins configuration (P[23:16] R, P[15:8] G, P[7:0] B) and XTAL frequency selection (28.63636 MHz)
    		{0x98, 0x05, 0x28}, // DE output selected, blank data during blanking periods, AV codes off
    		{0x98, 0x06, 0xA2}, // VSYNC output selected, negative DE polarity, negative VSYNC polarity, positive HSYNC polarity, do not invert LLC
    		{0x98, 0x0B, 0x44}, // Power up CP, digital sections of HDMI block, and XTAL buffer to the digital core
    		{0x98, 0x0C, 0x42}, // Chip is operational, power save mode disabled, powers up CP core clock, and digital output pins pads
    		{0x98, 0x14, 0x7F}, // Set max drive strength for output data, LLC, HSYNC, VSYNC, and DE
    		{0x98, 0x15, 0x80}, // Disable tristate of pins
    		{0x98, 0x19, 0x83}, // Enable LLC DLL
    		{0x98, 0x33, 0x40}, // Muxes the DLL output on LLC output
    
    		// CP Map 
    		{0x44, 0x91, 0x00}, // Progressive video mode
    		{0x44, 0xBA, 0x00}, // Disable HDMI free run
    		{0x44, 0xC9, 0x2D}, // Disable buffering of timing parameters used for free run in HDMI mode
    		{0x44, 0xF2, 0x04}, // Enable CRC checking
    
    		// KSV (Repeater) Map 
    		{0x64, 0x40, 0x81}, // Disable HDCP 1.1 features
    
    		// HDMI Map 
    		{0x68, 0x00, 0x00}, // I2C address for HDCP port is 0x74, set HDMI input Port A
    		{0x68, 0x83, 0xFE}, // Enable clock termination on port A
    		{0x68, 0x8D, 0x04}, // LF gain equalizer settings
    		{0x68, 0x8E, 0x1E}, // HF gain equalizer settings
    		{0x68, 0x1A, 0x8A}, // Discard audio sample packets with invalid parity bit, unmute audio
    		{0x68, 0x96, 0x01}, // Enable HDMI Equalizer Dynamic Control
    		// ADI recommends that these register settings are programmed to setup the ADV7610 correctly in HDMI mode
    		{0x68, 0x9B, 0x03}, // ADI recommended setting
    		{0x68, 0x6F, 0x08}, // ADI recommended setting
    		{0x68, 0x85, 0x1F}, // ADI recommended setting
    		{0x68, 0x87, 0x70}, // ADI recommended setting
    		{0x68, 0x57, 0xDA}, // ADI recommended setting
    		{0x68, 0x58, 0x01}, // ADI recommended setting
    		// For non-fast switching applications, the following settings are recommended
    		{0x68, 0xC1, 0x01}, // ADI recommended setting
    		{0x68, 0xC2, 0x01}, // ADI recommended setting
    		{0x68, 0xC3, 0x01}, // ADI recommended setting
    		{0x68, 0xC4, 0x01}, // ADI recommended setting
    		{0x68, 0xC5, 0x01}, // ADI recommended setting
    		{0x68, 0xC6, 0x01}, // ADI recommended setting
    		{0x68, 0xC7, 0x01}, // ADI recommended setting
    		{0x68, 0xC8, 0x01}, // ADI recommended setting
    		{0x68, 0xC9, 0x01}, // ADI recommended setting
    		{0x68, 0xCA, 0x01}, // ADI recommended setting
    		{0x68, 0xCB, 0x01}, // ADI recommended setting
    		{0x68, 0xCC, 0x01}, // ADI recommended setting
    		{0x68, 0x75, 0x10}, // DDC drive strength
    
    		// KSV (Repeater) Map
    		{0x64, 0x74, 0x00}, // Disable internal EDID for port A
    
    		// EDID Map 
    		{0x6C, 0x00, 0x00},
    		{0x6C, 0x01, 0xFF},
    		{0x6C, 0x02, 0xFF},
    		{0x6C, 0x03, 0xFF},
    		{0x6C, 0x04, 0xFF},
    		{0x6C, 0x05, 0xFF},
    		{0x6C, 0x06, 0xFF},
    		{0x6C, 0x07, 0x00},
    		{0x6C, 0x08, 0x06},
    		{0x6C, 0x09, 0x8F},
    		{0x6C, 0x0A, 0x07},
    		{0x6C, 0x0B, 0x11},
    		{0x6C, 0x0C, 0x01},
    		{0x6C, 0x0D, 0x00},
    		{0x6C, 0x0E, 0x00},
    		{0x6C, 0x0F, 0x00},
    		{0x6C, 0x10, 0x17},
    		{0x6C, 0x11, 0x11},
    		{0x6C, 0x12, 0x01},
    		{0x6C, 0x13, 0x03},
    		{0x6C, 0x14, 0xA2},
    		{0x6C, 0x15, 0x4F}, // Aspect ratio 16:9
    		{0x6C, 0x16, 0x00}, // Aspect ratio landscape
    		{0x6C, 0x17, 0x78},
    		{0x6C, 0x18, 0x1E},
    		{0x6C, 0x19, 0x1E},
    		{0x6C, 0x1A, 0xAC},
    		{0x6C, 0x1B, 0x98},
    		{0x6C, 0x1C, 0x59},
    		{0x6C, 0x1D, 0x56},
    		{0x6C, 0x1E, 0x85},
    		{0x6C, 0x1F, 0x28},
    		{0x6C, 0x20, 0x29},
    		{0x6C, 0x21, 0x52},
    		{0x6C, 0x22, 0x57},
    		{0x6C, 0x23, 0x01}, // Established Timings I :  800x600@60Hz VESA
    		{0x6C, 0x24, 0x08}, // Established Timings II: 1024x768@60Hz VESA
    		{0x6C, 0x25, 0x00},
    		{0x6C, 0x26, 0x01},
    		{0x6C, 0x27, 0x01},
    		{0x6C, 0x28, 0x01},
    		{0x6C, 0x29, 0x01},
    		{0x6C, 0x2A, 0x01},
    		{0x6C, 0x2B, 0x01},
    		{0x6C, 0x2C, 0x01},
    		{0x6C, 0x2D, 0x01},
    		{0x6C, 0x2E, 0x01},
    		{0x6C, 0x2F, 0x01},
    		{0x6C, 0x30, 0x01},
    		{0x6C, 0x31, 0x01},
    		{0x6C, 0x32, 0x01},
    		{0x6C, 0x33, 0x01},
    		{0x6C, 0x34, 0x01},
    		{0x6C, 0x35, 0x01},
    		{0x6C, 0x36, 0x76}, // Preferred Detailed Timing: 1280x960@60Hz VESA
    		{0x6C, 0x37, 0x1F},
    		{0x6C, 0x38, 0x00},
    		{0x6C, 0x39, 0x50},
    		{0x6C, 0x3A, 0x50},
    		{0x6C, 0x3B, 0xC0},
    		{0x6C, 0x3C, 0x1C},
    		{0x6C, 0x3D, 0x30},
    		{0x6C, 0x3E, 0x08},
    		{0x6C, 0x3F, 0x20},
    		{0x6C, 0x40, 0xE8},
    		{0x6C, 0x41, 0x00},
    		{0x6C, 0x42, 0x00},
    		{0x6C, 0x43, 0x00},
    		{0x6C, 0x44, 0x00},
    		{0x6C, 0x45, 0x00},
    		{0x6C, 0x46, 0x00},
    		{0x6C, 0x47, 0x1A},
    		{0x6C, 0x48, 0x9B}, // Second Detailed Timing: 854x960@60Hz VESA
    		{0x6C, 0x49, 0x15},
    		{0x6C, 0x4A, 0x56},
    		{0x6C, 0x4B, 0x50},
    		{0x6C, 0x4C, 0x30},
    		{0x6C, 0x4D, 0xC0},
    		{0x6C, 0x4E, 0x1C},
    		{0x6C, 0x4F, 0x30},
    		{0x6C, 0x50, 0x08},
    		{0x6C, 0x51, 0x20},
    		{0x6C, 0x52, 0xE8},
    		{0x6C, 0x53, 0x00},
    		{0x6C, 0x54, 0x00},
    		{0x6C, 0x55, 0x00},
    		{0x6C, 0x56, 0x00},
    		{0x6C, 0x57, 0x00},
    		{0x6C, 0x58, 0x00},
    		{0x6C, 0x59, 0x1A},
    		{0x6C, 0x5A, 0xAB}, // Third Detailed Timing: 720x1280@60Hz VESA
    		{0x6C, 0x5B, 0x18},
    		{0x6C, 0x5C, 0xD0},
    		{0x6C, 0x5D, 0x50},
    		{0x6C, 0x5E, 0x20},
    		{0x6C, 0x5F, 0x00},
    		{0x6C, 0x60, 0x25},
    		{0x6C, 0x61, 0x50},
    		{0x6C, 0x62, 0x08},
    		{0x6C, 0x63, 0x20},
    		{0x6C, 0x64, 0x78},
    		{0x6C, 0x65, 0x04},
    		{0x6C, 0x66, 0x00},
    		{0x6C, 0x67, 0x00},
    		{0x6C, 0x68, 0x00},
    		{0x6C, 0x69, 0x00},
    		{0x6C, 0x6A, 0x00},
    		{0x6C, 0x6B, 0x1A},
    		{0x6C, 0x6C, 0x15}, // Fourth Detailed Timing: 1920x1080@60Hz VESA 
    		{0x6C, 0x6D, 0x34}, 
    		{0x6C, 0x6E, 0x80},
    		{0x6C, 0x6F, 0x50},
    		{0x6C, 0x70, 0x70},
    		{0x6C, 0x71, 0x38},
    		{0x6C, 0x72, 0x1F},
    		{0x6C, 0x73, 0x40},
    		{0x6C, 0x74, 0x08},
    		{0x6C, 0x75, 0x20},
    		{0x6C, 0x76, 0x18},
    		{0x6C, 0x77, 0x04},
    		{0x6C, 0x78, 0x00},
    		{0x6C, 0x79, 0x00},
    		{0x6C, 0x7A, 0x00},
    		{0x6C, 0x7B, 0x00},
    		{0x6C, 0x7C, 0x00},
    		{0x6C, 0x7D, 0x1A},
    		{0x6C, 0x7E, 0x00}, // Extension flag
    		{0x6C, 0x7F, 0x21}, // Checksum
    
    		// KSV (Repeater) Map
    		{0x64, 0x74, 0x01}, // Enable internal EDID for port A
    
    // HDMI Map {0x68, 0x6C, 0xA3} // Manual HPA enable (set high by default)
  • Hi,

      Thanks for sharing the register configuration and we will run your configuration for 1280x960@60Hz using AVES blue tool and let you know about the status.

      Please let us know, what tool (AVES/DVP) are you using from your end ?

    Thanks,

    Poornima

  • Hi,

    As I mentioned we are not using your evaluation board, hence we are neither using AVES nor DVP tool.

    We are programming the ADV7610 through a soft processor (Xilinx Microblaze) synthesized on an FPGA.

    Thanks,

    Mattia

  • Hi,

       Here we have validated the 1280X960@60 using QD804B as an generator by running 1080p script but we could able to get the proper output. Please refer below snap for your reference

      

    Script:

    Thanks,

    Poornima

  • Hi,

    Here we have validated the 1280X960@60 using QD804B as an generator by running 1080p script 

    Could you please share this script with me? I cannot find it among the ADV7610 example scripts provided.

    Thanks for sharing the register configuration and we will run your configuration for 1280x960@60Hz

    Could you eventually test my configuration script with your set up?

    Thank you in advance,

    Mattia

  • Hi,

      Could you please share this script with me? I cannot find it among the ADV7610 example scripts provided.

        We have run the '6-1f Port A' script  - 'ADV7610-VER.1.0c.txt'.

     Could you eventually test my configuration script with your set up?

        Sorry, we have not yet verified your script.

         Will check and let you know.

    Thanks,

    Poornima

  • Hi,

    I just managed to compare our script with the example one you used (6-1f Port A).

    In the end the main difference between the two scripts lies in the VID_STD configuration (register 0x00 of the IO map). Indeed, leaving the register at its default value (0x08) instead of writing 0x02, makes the system work.

    However, I think the user guide UG-438 is misleading since at page 18 it mentions that if free run and decimation are not required, for HDMI mode it is recommended to set PRIM_MODE to 0x06 and VID_STD to 0x02.

    Thank you for helping me solve this problem,

    Mattia

  • Hi,

      Please refer below comment,

        However, I think the user guide UG-438 is misleading since at page 18 it mentions that if free run and decimation are not required, for HDMI mode it is recommended to set PRIM_MODE to 0x06 and VID_STD to 0x02.

         Please note "PRIM_MODE and VID_STD set the free run format only, Since they are not required, especially if free run is disabled.  So you can leave these two at their default values if you are not using them.

         Note:  PRIM_MODE and VID_STD are used to set the free run format.  They do not have anything to do with detecting the incoming format coming from the source.

    Thanks,

    Poornima