ADV7403 register configuration for STANAG 3350 CLASS B/C Video Signals

Hi,

  Please refer this configuration script  " ##SCART RGB## "(:SCART RGB IN In Thru CP YPrPb 2X1  8Bit 422 Out through Encoder)  in that don't use CVBS connection in the AIN pin and follow the remaining configuration w.r.t reference script

 SOG register related configuration are provided in ADV7403 manual & adjust the sync slicer to use SOG.

 Also use registers 0xC3 & 0XC4 for configuring the AIN1,AIN2,AIN3 and crosscheck this configuration(ADC SWITCH) in Page 277.

Thanks,

Poornima

Hi,

Thank you for your response.

I want to understand, If I use Ain1, Ain2, and Ain3 using C3 and C4 registers, how ADV7403 understands that Ain1 is G, Ain2 is B and Ain3 is R? With the script given, is it possible that the Chip will recognize Ain1 as G, Ain2 as B and Ain3 as R? Is there any specific settings to be done in order to give RGB properly to the chip?

Thank you.

Hi,

  "The analog input muxes of the ADV7403 must be controlled directly. This is referred to as manual input muxing.     The manual muxing is activated by setting the ADC_SWITCH_MAN bit. It only affects the analog switches in front of the ADCs.

Please note PRIM_MODE and VID_STD still have to be set so that the follow on blocks process the video data in the correct format." 

Refer below configuration for 0xC3 & 0xC4 for processing the RGB inputs using AIN pins.

  Ain1 as G    ADC0_SW[3:0]  0xc3   -  0001
  Ain2 as B    ADC2_SW [3:0] 0xC4   -  0010
  Ain3 as R    ADC1_SW [3:0] 0xc3  -    0011

Note:  The manual muxing is activated by setting the ADC_SW_MAN_EN bits. It only affects the analogue switches in front of the ADCs. PRIM_MODE and VID_STD still have to be set so the follow-on blocks process the video data in the correct format. Which means: If the settings of INSEL and the manual input muxing registers (ADC0/1/2/3_SW) contradict each other, the ADC0/1/2/3_sw settings apply and INSEL is ignored. For more details please refer Page 19 in ADV7403 manual.

Thanks,

Poornima

Hi,

  "The analog input muxes of the ADV7403 must be controlled directly. This is referred to as manual input muxing.     The manual muxing is activated by setting the ADC_SWITCH_MAN bit. It only affects the analog switches in front of the ADCs.

Please note PRIM_MODE and VID_STD still have to be set so that the follow on blocks process the video data in the correct format." 

Refer below configuration for 0xC3 & 0xC4 for processing the RGB inputs using AIN pins.

  Ain1 as G    ADC0_SW[3:0]  0xc3   -  0001
  Ain2 as B    ADC2_SW [3:0] 0xC4   -  0010
  Ain3 as R    ADC1_SW [3:0] 0xc3  -    0011

Note:  The manual muxing is activated by setting the ADC_SW_MAN_EN bits. It only affects the analogue switches in front of the ADCs. PRIM_MODE and VID_STD still have to be set so the follow-on blocks process the video data in the correct format. Which means: If the settings of INSEL and the manual input muxing registers (ADC0/1/2/3_SW) contradict each other, the ADC0/1/2/3_sw settings apply and INSEL is ignored. For more details please refer Page 19 in ADV7403 manual.

Thanks,

Poornima

Hi,

Thank you for your reply.

I am able to detect the output from ADV7403, confirmed the detection using Status register 0x12[6].

But I have some questions regarding the output.

In my case, the PRIM_MODE will be set to SD? Can you please let me know the values for PRIM_MODE and VID_STD in my case.

If I need the output in BT.656 format, should I set any other register values?
 
I wanted to confirm whether the output whatever I am able to capture with the given script is in BT.656 format.

Can I use any other status registers to confirm the output data format? 

Thank you.

Hi,

   Generally PRIM_MODE and VID_STD are used to set up the free run modes.These controls are used to specify the free run output standard. Please refer table 12 in ADV7403 manual for setting the PRIM_MODE and VID_STD based upon your formats.

 Regarding BT.656 output, Please configure the OF_SEL[3:0] register for BT.656 setting & refer below snap for your reference,
     

Thanks,

Poornima

Hello Poornima,

Thank you for your reply.

I am able to get the output in the BT.656 format. But there is a greenish tint on the output as in the below image.

As you can see in the above image, there is a green colour issue with the image.

Can you please suggest any changes to the register values to remove this greenish tint on the output?

I tried a couple of CSC registers, but the same issue exists. 

Thank you.

Hi,

 Please ensure 0x86 register value as 0x0B - "42 86 0B".

Thanks,

Poornima

Hello,

Thank you for your input.

I have checked the register 0x86, it is set for 0x0B. 

Thank you.

Hi,

  If Possible, Could you please share your register configuration.

Thanks,

Poornima

Hi,

I have attached the register set used .

Please go through it and let me know any changes to be done.

Thank you.

XLSX

Hi,

  Please configure the CSC registers as like below configuration,

0x52 0x00 Conversion from RGB -> YPbPr
0x53 0x00 CSC Start
0x54 0x07 CSC Register
0x55 0x0C CSC Register
0x56 0x99 CSC Register
0x57 0xA9 CSC Register
0x58 0x71 CSC Register
0x59 0x08 CSC Register
0x5A 0x00 CSC Register
0x5B 0x20 CSC Register
0x5C 0xA7 CSC Register
0x5D 0xA9 CSC Register
0x5E 0x1A CSC Register
0x5F 0x8F CSC Register
0x60 0x08 CSC Register
0x61 0x00 CSC Register
0x62 0x7A CSC Register
0x63 0xE1 CSC Register
0x64 0x05 CSC Register
0x65 0x39 CSC Register
0x66 0x1F CSC last
0x73 0xD0 Enable Manual Gain and set CH_A gain
0x74 0x04 Set CH_A and CH_B Gain
0x75 0x01 Set CH_B and CH_C Gain
0x76 0x00 Set CH_C Gain

Thanks,

Poornima

Hello Poornima,

Thank you for your reply.

Tried configuring the given CSC register settings along with other registers mentioned in the previous mail, but the colours are not proper as in the below image.

There is colour swapping as you can see in the above image.

Thank you.

Hi,

  Please try configuring the 0X74 ,0X75 ,0X76 ,0X77 ,0X78,0X79 , 0X7A registers as once & it seems you have been configured these registers as twice.
  Also try to swap the Cr,Cb by using register "SWPC Swap Pixel Cr/Cb (SDP), Address 0x27[7]"  & let us know.

Thanks,

Poornima