ADV7626 HDCP test 3C-1-4 Fail

On the ADV7626, I ran the HDCP certification test 3C-1-4 and got a FAIL with "Bcaps: READY bit is one".

After checking the contents of the test, after TE set AKSV again in the certification test "STEP S201S",
I read the BCAPS of the DUT and verify that the BCAPS [5]: KSV FIFO Ready bit is down,
In BCAPS read by TE, the Ready bit appears to be standing, so it is FAIL.

In the ADV HW manual "6.27.1 Repeater Routines Performed by Repeater Controller"
It is written that the Ready bit drops when AKSV is received, but in BCAPS read by TE via DDC, the Ready bit seems to remain up.

Even if the BCAPS register (0x40) of Rx Repeater Map is read at the timing of the problem occurrence, the Ready bit part seems to be R / W impossible and the status cannot be confirmed from the driver.

I am reading BCAPS from TE via DDC. Is there a way to check the value of BCAPS read by this DDC in the register of the chip?

Also, if you know how to drop the Ready flag and why Ready does not drop, please let me know.

The ADV HW manual states that writing aksv [39:32] triggers BCAPS [5] to be set to "0".

I tried to read the AKSV register (0x14) of Rx Repeater Map and write the value when the status bit of AKSV update was set, but the Ready bit was still set.

  • 0
    •  Analog Employees 
    on Sep 16, 2021 9:41 AM

    Hi Eisuke,

          Yes, the repeater controller automatically resets the BCAPS[5] bit to 0 when a HDCP Tx writes its AKSV into the HDCP registers.

          For that Please ensure with AKSV interrupt register(aksv_update_rx1_mb1/mb2, aksv_update_rx2_mb1/mb2 set to '1') has been configured properly & this in turn will triggers the EDID/repeater controller to reset the BCAPS[5] bit back to 0.

    Also Please read register 0XBE(Read only Register)  - BCAPS[7:0] (HDMI Tx Main Map)
                      This register is used to readback the BCAPS value.

                       BCAPS[6] indicates Repeater, BCAPS[5] indicates BKSV FIFO ready, BCAPS[4] indicates Fast DDC bus, BCAPS[1] indicates HDMI 1.1, BCAPS[0] indicates Fast Re-authentication, See the HDCP specification.

    Thanks,

    Poornima

  • Hi,

    When I made a repeater connection on the RX1 side, I confirmed the update of AKSV with ksv_update_rx1_raw (IO Main 0x75), so I changed it to set aksv_update_rx1_mb1 and check aksv_update_rx1_st.
    But the bit of BCAPS [5] remained "1".

    When the bit of aksv_update_rx1_raw (IO Main 0x75) was set and the value of 0xBE was read, it was "0x0".Isn't the value of 0xBE the BCAPS obtained from the Sink device connected to the end of the ADV7626 TX core?
    (Isn't it BCAPS that the RX core of ADV7626 is sending to the source device?)
    When working together within the core, what kind of processing sequence does RX BCAPS (Rx Rep: 0x40) work together inside the ADV7626 after receiving TX BCAPS (TX Main: 0xBE) and AKSV of the Rx core?

  • 0
    •  Analog Employees 
    on Sep 17, 2021 10:24 AM in reply to MontBlanc

    Hi,

    When working together within the core, what kind of processing sequence does RX BCAPS (Rx Rep: 0x40) work together inside the ADV7626 after receiving TX BCAPS (TX Main: 0xBE) and AKSV of the Rx core?

     Below i have share the general sequence about HDCP, You can find more information about in the HDCP specification as well as this white paper

     http://www.extron.com/download/files/whitepaper/hdcp_wp.pdf

      Also it is the responsibility of the application software and pass this information to devices supplying it with data. So Please crosscheck with Software package for evaluation board

    Note:  REPEATER bit should be set before the HDCP transmitter initiates authentication. If the system is a repeater, that should therefore be set at the initialization of the system.

     READY bit should be set when the HDCP repeater has gathered the attached KSVs and computed the verification value, as required by the HDCP specification .

    Thanks,

    Poornima

  • Hi,

    I'm sorry, "S201S" in the authentication process is a mistake of "S102S".

    We have confirmed that the initial authentication process has been completed normally and that KSV Ready is set to "1".
    The problem is that when doing the reauthentication process, the KSV Ready remains "1" even if the AKSV is resent.

    The HDCP repeater "3C-1-4" test is an abnormal test.
    "3C-1-4: Irregular procedure: (Second Part of authentication) New Authentication"

    This is to redo the authentication process again when the "Second Part of authentication" is completed, but when entering this re-authentication process (S102S), even if the ADV7626 receives the AKSV, the KSV of BCAPS as seen from TE The problem is that the Ready bit is still maintained and does not go to "0".

    Therefore, I would like to know why the KSV Ready Bit does not drop even though the AKSV is received and the AKSV update status is set at the timing of re-authentication.

    Isn't there a setting in ADV7626 to drop the KSV Ready bit because it doesn't seem to be "0" even if the writing of aksv [39:32] is completed and the status of AKSV update is set? ??

    I share a log of the authentication process with Macnica when a problem occurs.
    From this log, you can check the sequence from the occurrence of an error and the status of DDC access, etc.

  • 0
    •  Analog Employees 
    on Sep 21, 2021 10:22 AM in reply to MontBlanc

    Hi,

    This is to redo the authentication process again when the "Second Part of authentication" is completed, but when entering this re-authentication process (S102S), even if the ADV7626 receives the AKSV, the KSV of BCAPS as seen from TE The problem is that the Ready bit is still maintained and does not go to "0".

         BCAP[5], READY KSV FIFO ready - When this bit is set to one,then the HDCP repeater has built the list of attached KSVs and computed the verification value of V' but this value is always zero during the computation of V'.

        So it means in your software you need to do the next action after you have been indicate the Tx that the KSV FIFO and SHA-1 hash value V’ are ready to be read.

         Ensure your software with "Figure 69: HDCP Software Implementation".

    Isn't there a setting in ADV7626 to drop the KSV Ready bit because it doesn't seem to be "0" even if the writing of aksv [39:32] is completed and the status of AKSV update is set? ??

      The repeater controller does not automatically clear ksv_list_ready_port_a to 0 after it has finished computing the SHA-1 value. Therefore, the external controller needs to clear "ksv_list_ready_port_a"

      Please note when the upstream Tx writes its AKSV even for the second time or more into the HDMI Rx HDCP registers, the external controller driving the repeater controller should set ksv_list_ready_port_a to 1.

    Note:  When ksv_list_ready_port_a is set to 1, the repeater controller computes the SHA-1 hash value V’, updates the corresponding V’ registers and sets the ready bit (that is, bit [5] of bcaps[7:0]) to 1. This indicates to the Tx attached to the ADV7625 that the KSV FIFO and SHA-1 hash value V’ are ready to be read.

    Thanks,

    Poornima