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When i connect a DVI generator device to our system based on ADV7611, i read the information "FIFO is about to overflow", with the video FIFO locked.

What is the meaning of this readback? How can i have more information about TMDS sampling , TMDS decoding, or FIFO process?

What can be the reason of this behavior?

Thanks for your answers.

  • Hi,

    Generally this DC FIFO registers we can use it for diagnostic purposes which will indicate the video FIFO status So depending upon that we know the status of the incoming video.

     If it is overflow or underflow, In that case we need to control the FIFO registers for normal operation then only we will get the appropriate video output.

    Video FIFO block is used to pass data safely across the clock domains.Video FIFO will provide extreme robustness to jitter on the TMDS clock &  and it is designed to operate completely autonomously.  It is possible for the user to observe and control the FIFO operation with a number of FIFO status and control registers.

    Please refer Spec to know more information about TMDS sampling and decoding.