Post Go back to editing

Script file of ADV7611 for 24bit SDR 4:2:2 Mode 2 output

In ADV7611 Design support file, all sample script are for 24 bit 4:4:4 SDR mode 0 only. I need for 24 bit 4:2:2 SDR mode 2. Could anyone please help me to get that?

I have attached the current script here and we are facing some flickering issue. Could anyone help us to figure it out the error on this script?

ADV_ADDR_2, 0x00, 0x08, // -video standard
ADV_ADDR_2, 0x01, 0x06, // primary mode
ADV_ADDR_2, 0x02, 0xf0,
ADV_ADDR_2, 0x03, 0x8A, // 24-Bit SDR ITU-R BT.656 4:2:2
ADV_ADDR_2, 0x04, 0x62,
ADV_ADDR_2, 0x05, 0x28,
ADV_ADDR_2, 0x06, 0xA6,

ADV_ADDR_2, 0x0b, 0x44,
ADV_ADDR_2, 0x0c, 0x42,
ADV_ADDR_2, 0x14, 0x5e,
ADV_ADDR_2, 0x15, 0x80,
ADV_ADDR_2, 0x19, 0x80,
ADV_ADDR_2, 0x33, 0x40,

CP_ADDR_2, 0xba, 0x41,
HDMI_ADDR_2, 0x6c, 0x24,
KSV_ADDR_2, 0x40, 0x81,
DPLL_ADDR_2, 0xb5, 0x00,

HDMI_ADDR_2, 0x9b, 0x03,
HDMI_ADDR_2, 0xc1, 0x01,
HDMI_ADDR_2, 0xc2, 0x01,
HDMI_ADDR_2, 0xc3, 0x01,
HDMI_ADDR_2, 0xc4, 0x01,
HDMI_ADDR_2, 0xc5, 0x01,
HDMI_ADDR_2, 0xc6, 0x01,
HDMI_ADDR_2, 0xc7, 0x01,
HDMI_ADDR_2, 0xc8, 0x01,
HDMI_ADDR_2, 0xc9, 0x01,
HDMI_ADDR_2, 0xca, 0x01,
HDMI_ADDR_2, 0xcb, 0x01,
HDMI_ADDR_2, 0xcc, 0x01,

HDMI_ADDR_2, 0x00, 0x00,
HDMI_ADDR_2, 0x83, 0xfe,

HDMI_ADDR_2, 0x6f, 0x08,
HDMI_ADDR_2, 0x85, 0x1f,
HDMI_ADDR_2, 0x87, 0x70,

HDMI_ADDR_2, 0x8d, 0x04,
HDMI_ADDR_2, 0x8e, 0x1e,
HDMI_ADDR_2, 0x1a, 0x8a,

HDMI_ADDR_2, 0x57, 0xda,
HDMI_ADDR_2, 0x58, 0x01,
HDMI_ADDR_2, 0x75, 0x10,

INFOFRAME_ADDR_2, 0x01, 0x00,
INFOFRAME_ADDR_2, 0x02, 0x60,
INFOFRAME_ADDR_2, 0x03, 0x00,
INFOFRAME_ADDR_2, 0x14, 0x70,
INFOFRAME_ADDR_2, 0x15, 0xe0,
INFOFRAME_ADDR_2, 0x16, 0x70,
INFOFRAME_ADDR_2, 0x18, 0x46,
INFOFRAME_ADDR_2, 0x40, 0x80,
INFOFRAME_ADDR_2, 0x41, 0x10,
INFOFRAME_ADDR_2, 0x49, 0xa8,
INFOFRAME_ADDR_2, 0x96, 0x20,
INFOFRAME_ADDR_2, 0x55, 0x40,
INFOFRAME_ADDR_2, 0x56, 0x08,
INFOFRAME_ADDR_2, 0x73, 0x07,
INFOFRAME_ADDR_2, 0x76, 0x1f,
INFOFRAME_ADDR_2, 0x98, 0x03,
INFOFRAME_ADDR_2, 0x99, 0x02,
INFOFRAME_ADDR_2, 0x9c, 0x30,
INFOFRAME_ADDR_2, 0x9d, 0x61,
INFOFRAME_ADDR_2, 0xa2, 0xa4,
INFOFRAME_ADDR_2, 0xa3, 0xa4,
INFOFRAME_ADDR_2, 0xa5, 0x04,
INFOFRAME_ADDR_2, 0xab, 0x40,
INFOFRAME_ADDR_2, 0xaf, 0x16,
INFOFRAME_ADDR_2, 0xba, 0x60,
INFOFRAME_ADDR_2, 0xd1, 0xff,
INFOFRAME_ADDR_2, 0xde, 0xd8,
INFOFRAME_ADDR_2, 0xe4, 0x60,
INFOFRAME_ADDR_2, 0xfa, 0x7d,

INFOFRAME_ADDR_2, 0x6c, 0x00,
HDMI_ADDR_2, 0xc0, 0x03,
HDMI_ADDR_2, 0x97, 0xc0,
HDMI_ADDR_2, 0x3d, 0x10,
HDMI_ADDR_2, 0x3e, 0x69,
HDMI_ADDR_2, 0x3f, 0x46,
HDMI_ADDR_2, 0x4e, 0xfe,
HDMI_ADDR_2, 0x4f, 0x08,
HDMI_ADDR_2, 0x50, 0x00,
HDMI_ADDR_2, 0x57, 0xa3,
HDMI_ADDR_2, 0x58, 0x07,
HDMI_ADDR_2, 0x93, 0x03,
HDMI_ADDR_2, 0x5a, 0x80,
HDMI_ADDR_2, 0x4c, 0x40,
HDMI_ADDR_2, 0x83, 0xfc,

HDMI_ADDR_2, 0x14, 0x0c,
HDMI_ADDR_2, 0x15, 0x14,
HDMI_ADDR_2, 0x16, 0xc0,

HDMI_ADDR_2, 0x01, 0x0c,

ADV_ADDR_2, 0x00, 0x08, // video standard
ADV_ADDR_2, 0x01, 0x06, // primary mode
ADV_ADDR_2, 0x02, 0xf0,
ADV_ADDR_2, 0x03, 0x8A, // 24-Bit SDR ITU-R BT.656 4:2:2
ADV_ADDR_2, 0x04, 0x62,
ADV_ADDR_2, 0x05, 0x28,
ADV_ADDR_2, 0x06, 0xA6,

KSV_ADDR_2, 0x74, 0x00,
CP_ADDR_2, 0x3e, 0x80

  • Hi,

       Could you please try the below configuration and let us know the result,

         98 14 7F ;    //Max Drive Strength
         98 19 83 ;    // LLC DLL phase
         68 6F 0C ;   //ADI recommended setting



  • Hi ADI team,

    Still we are facing the same issue. We are using two ADV7611 and both are working okay. But in Second ADV7611, we are facing some frame skips. Some times it will accumulates and display loss is happening for a short while. I think this issue might be due to this improper script. We are not using audio from ADV7611. Could you please ping me because i want to discuss in deeper level based on some confidential data.



  • Hi Meenu,

      Could you please try below setting,

         0x98, 0x05, 0x2C.

      Also Please make sure with pixel output assignment for "24 bit 4:2:2 SDR mode 2" as per below table. Refer below snap for your reference



  • Hi Poornima,

    Still, we are facing same issue.

    Yes. we did everything already as what you mentioned

    Instead of connecting RESET pin of ADV7611 to Micro controller, it has been pulled up. Will it lead to some flicking issue?

    Actually, how can we confirm that output data of ADV7611 is stable and reliable for video data?



  • Hi,

     Could you try below final configuration and let us know,

          ADV_ADDR_2, 0x03, 0x80, // 16-bit SDR ITU-R BT.656 4:2:2 Mode 0

     Please let us know which part are you using in Tx side ?

    Please probe the VS, HS and DE pins to check the output data is stable from ADV7611.

    Also HDMI frontend locking status registers is used to check whether the input device is correctly recognized.
              a) Registers HDMI 0x04, 0x07, 0x1B, 0xE0
              b) Registers IO 0x6A, 0x6B



  • Hi Poornima,

    we can not configure the 16 bit mode since 24 bit mode configuration is implemented on our custom board.

    we probed the LLC and pulse pins. LLC is looks like sinusoidal wave instead of square wave with no ringing. Actually we connected 22 ohm series resistor and 50 ohm impedance matched lines. but LLC lines is having jitter. To rectify that we have tried with different drive strength and 32 DLL settings.

    0x9A,0x14, 0x5E

    0x9A, 0x19, 0x8A

    0x9A, 0x33, 0x40

    It is still not fixed. It seems some data are missing because of the jitter and sinusoidal nature of the LLC.

    Regarding Front End: HDMI input source is from PC and confirmed that input source is okay.

    Meanwhile, I have one more query. We are using GS2972 at Tx side of ADV7611. it has the feature of extracting video timing codes (8 /10 bit TRS code words) from the parallel data bus. If we embed the timing codes in parallel data bus from the ADV7611, then we can avoid the dependency on the LLC and sync pulses.

    May i know that if is it feasible?  It is much appreciated, if you provide some inputs on that.



  • Hi,

       In general the drive strength and trace impedance must match to reduce ringing

      The ringing is caused by a mis-match in the drive strength and trace impedance.  Try lowering the drive strength for the pin output or increasing the series resistor.Note increasing the series resistor will cause issues at 150MHz and change driver strength to match frequency.

      jitter issue only occurring with some boards,It seems like the layout and power supply stability.Please crosscheck at

    DR_STR, DR_STR_CLK, DR_STR_SYNC effect the output drive strengths of the pixel bus pins.And also if you over drive the pins(DR_STR,DR_STR_CLK,DR_STR_SYNC),  you can get ringing on the lines that can also cause problems.

     Depending on your board,you might have a phase issue causing an instability.Check here for how to select the right phase shift

    GS2972 would accept 20bit or 10bit data input,
       ADV7611 output mode support SDR4:2:2(8bit/12bit/16bit/24bit) and SDR4:4:4(24bit); or DDR4:2:2(8bit/12bit) and DDR4:4:4(24bit);

    Expert suggestion would be like

    The only way to accomplish 10-bit data, 4:2:2 is use OP_FORMAT_SEL = 0x8A and ignore the lower 2 bits of the 12-bit channel.

    For 20-bit data, SDR 4:2:2 24-bit is use OP_FORMAT_SEL=0x8A and not connect the lower 2 bits on each bus".



  • Hi Poornima,

    Actually 24 bit SDR 4:2:2 mode(0x8A) has been used here and least significant 2 bits of YCbCr are discarded. Yes we tried the different drive strength on that pins all are sinusoidal. 

    0x9A,0x14, 0x5E

    0x9A, 0x19, 0x8A

    0x9A, 0x33, 0x40

    Above settings are the better one when i cmopared with rest of the settings.

    All 32 DLL phase settings and drive strength did not help us to resolve the issue. Still it is sinusoidal LLC.
    We found in the datasheet on page 12 that timing codes can be embedded into parallel data (screenshot is attached for reference). But it is not much described in the Reference Manual. Is it possible to do that? If so, it will help us since GS2972 can support extracting the same from the parallel data bandwidth (8 /10 bit TRS code words).
    Thanks and Regards,
  • Hi,

      Could you please try with below AV code registers & look for the AV Code Block section in the ADV7611 Reference manual(Page 110). It details the controls that let insert those codes.

        2. AV_POS_SEL
        3. AV_INV_V:
        4. AV_INV_F



Reply Children
No Data