ADV7511 N and CTS values for pixel clock 138.5 MHz

I am trying to setup an audio test for the SPDIF input of the ADV7511. The sample rate I want to test is 48 kHz and the pixel clock I'm using is 138.5 MHz. Could you tell me which values are accepted for that pixel clock to be able to get clean audio out of the ADV7511 output? In the ADV7511 Programming Guide document It only specifies the values for 148.5 MHz pixel clock.

  • 0
    •  Analog Employees 
    on Jul 28, 2021 7:26 AM

    Hi,

      Please let us know, which format are you giving from your end.

      Please note that the CTS / N registers are based on your pixel clock & You have to tweak N and CTS values to get good audio out.

      Moreover it is good to use the HDMI generator and analyzer for initial development and this would be helpful for debugging the HDMI audio projects

      Refer HDMI specification 1.4 b section” Audio” to know more details about  Audio clock regeneration. The recommended N and expected CTS values for several standard TMDS clock rates are listed down in Table 7.1, 7.2 and 7.3.

      Note:  We have verified with evaluation platform by inputting different audio input sample frequencies like 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, 176.4 kHz, 192 kHz using script and software driver and found the N and CTS values are updated correctly in the HDMI Protocol analyzer which is same as per the HDMI specifications as reference.

    Thanks,

    Poornima

  • I am sending an HD video image 1920x1080 @60 Hz with CVT-RB standard for an LCD monitor. Using the recommended N value for the 138.5 MHz TMDS when sampling rate is 48 kHz clock according to the spec I'm getting the following CTS value on register 0x04: 0x58bc9 which in decimal is 363,465 and exceeds the expected CTS value for a pixel clock of 297 MHz. I'm also sending you attached a dump of the ADV7511 registers when sample rate is 48 kHz to check if any values are incorrect.

    I2C_dump_48_kHz.txt
    No size specified (using byte-data access)
         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
    00: 14 00 18 00 25 8b c9 00 00 00 10 8e 00 18 01 13    ?.?.%??...??.???
    10: 25 37 00 00 00 05 12 00 46 62 04 a8 00 00 1c 84    %7...??.Fb??..??
    20: 1c bf 04 a8 1e 70 02 1e 00 00 04 a8 08 12 1b ac    ?????p??..??????
    30: 00 00 00 00 00 00 00 00 00 00 00 80 00 10 40 00    ...........?.?@.
    40: 80 10 f0 7e 78 68 00 00 00 a8 80 00 00 00 00 00    ???~xh...??.....
    50: 00 00 02 0d 6d 02 00 00 00 00 00 00 00 00 00 00    ..??m?..........
    60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    70: 01 0a 00 01 00 00 00 00 00 00 00 00 00 00 00 00    ??.?............
    80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
    90: 00 00 00 00 c0 80 20 00 03 02 e0 18 30 61 16 00    ....?? .????0a?.
    a0: 00 00 a4 a4 08 04 00 00 00 00 00 40 00 00 40 06    ..????.....@..@?
    b0: 00 00 00 00 00 00 00 00 20 00 00 00 92 ac 80 da    ........ ...????
    c0: 9b 95 54 e0 00 10 16 00 04 03 00 00 02 00 01 04    ??T?.??.??..?.??
    d0: 3c ff 80 80 80 00 c0 00 00 00 00 00 00 00 10 01    <.???.?.......??
    e0: d0 70 01 00 60 00 00 00 00 00 00 00 00 00 00 00    ?p?.`...........
    f0: 00 00 00 00 00 75 11 00 00 00 00 02 00 00 00 00    .....u?....?....

  • 0
    •  Analog Employees 
    on Jul 30, 2021 11:50 AM in reply to Vasileios

    Hi,

      N and CTS value will be different for different TMDS clock frequency, for example if TMDS clock is 297MHZ then the CTS value would be like "281250".

       Please let us know,for 148.5Mhz tmds clock are you getting the expected CTS value as mentioned in the spec?

       Also could you please send the sequence register configuration.

    Thanks,

    Poornima