ADV7343 Progressive Mode settings

Hi,

  Please configure the 0x80 register for PAL because by default it will be in NTSC input. Refer below snap for your reference.

Thanks,

Poornima

Hello,

The 0x80 register is configured to PAL with 0x11 value

Can we get progressive video in SD mode?

Like in SD mode we have only two synchronization signals Vsync and Hsync,

For progressive we need Data valid signal, am I correct ?

Thanks & Regards,

Arpitha

Hi,

 Please make sure with below things,

   1. Have you implemented filtering on the chip supplies? In particular, is there some filtering on the PVDD supply? Noise on this supply can cause video quality to be poor.
   2. Is the encoder configured in full or low drive mode? If in low drive mode, have you low pass filtering on the output?
   3. Have you tried using a different monitor? 288p is an odd resolution that some monitors may handle differently.

Thanks,

Poornima

Hello,

I will check those points and come back to you.

Thanks,

Arpitha

Hello,

With the chipset ADV7343, facing bit of color issues.

The chip is configured to give PAL output from DAC4

Issues are :-

Red component is seen more in the output display,

colors are darken compare to the original image (example sky blue to dark blue and brown color is seen as red)

We suspect it is because of ADV7343 chipset,

Can you suggest any register set configuration to be done or checked for this.

Thanks & Regards,

Arpitha

Hello,

With the chipset ADV7343, facing bit of color issues.

The chip is configured to give PAL output from DAC4

Issues are :-

Red component is seen more in the output display,

colors are darken compare to the original image (example sky blue to dark blue and brown color is seen as red)

We suspect it is because of ADV7343 chipset,

Can you suggest any register set configuration to be done or checked for this.

Thanks & Regards,

Arpitha

Hi,

  Please let us know, other DAC's also you are facing the same issue ?

  Also which interface you are taking the output (CVBS), S-Video (YC), and component (YPrPb/RGB) analog outputs ?

Thanks,

Poornima

Hello,

We have only enabled DAC4 to transmit the PAL video out i.e. CVBS (where we are facing issue mentioned above)

DAC1,DAC2,DAC3 are enabled to transmit the RGB video, in this case what we observe at the output is the blue color is missing and yellowish over layer is seen at the output.

Thanks & Regards,

Arpitha

Hi,

 Please note that, If any impedance mis-match could also cause an color issue, so expert suggested a simple tool here that can give you a first pass estimate of what the trace impedance is for various board stack ups and trace widths. Please crosscheck with your board with impedence calculator  PCB Trace Impedance Calculator - Documents - Video - EngineerZone

Please try to configure SD chroma filter(0x80[7:5]) with different frequency and let us know whether you got any improvement.

Also make sure the below DAC output registers are configured in right way.

And ensure DAC outputs are operating in correct mode, Since DAC4 will operate only in low-drive mode.

Note: FPGA clock outputs are not very stable or accurate.  This may cause color distortion and this is why you will see all our reference designs using crystals or oscillators for the 27MHz source. 

Thanks,

Poornima

Hello,

I have enabled the internal test pattern of the encoder ADV7343 IC

This are the following configurations done:-

{0x56,0x17,0x02},
{0x56,0x00,0xFC},
{0x56,0x02,0x10},
{0x56,0x82,0xC0},
{0x56,0x84,0x40},
{0x56,0x8C,0xCB},
{0x56,0x8D,0x8A},
{0x56,0x8E,0x09},
{0x56,0x8F,0x2A},

The color bar should be white, yellow, cyan, green, pink, red, blue, black

But i am observing the following attached test patterns from DAC 4 (CVBS) and RGB from DAC 1,2,3

because of the display size the white color is not seen, but in DAC 4 we are not able to get the expected

color

Thanks & Regards,

Arpitha

  (1)From DAC4

(2)From DAC 1,2 and 3

Hi,

  For internal test pattern generation, Some of the below register configuration seems indifferent.

  Kindly let us know, whether you have configured this for some specific purpose.

PAL test pattern: Please make sure with below register settings,

     0x17  - 0x02

    0x00 - 0xFC

    0x82 - 0xC9

    0x84 - 0x40

    0x80 - 0x11

    0x8C - 0xCB

    0x8D - 0x8A

    0x8E - 0x09

    0x8F - 0x2A

NTSC color test pattern: Please make sure with below register settings,

    0x17  - 0x02

    0x00 - 0xFC

    0x82 - 0xC9

Thanks,

Poornima

Hello

Thank you for the response

PAL test pattern: Please make sure with below register settings :-  I tested with this register settings mentioned here but the observation is same as before.

Thanks & Regards,

Arpitha

Hello

Thank you for the response

PAL test pattern: Please make sure with below register settings :-  I tested with this register settings mentioned here but the observation is same as before.

Thanks & Regards,

Arpitha

Hi,

  Please check with other ADV734x part , the test pattern should work if you follow the standard scripts and you sure that stable 27MHZ is applied to the CLKIN.

 Also make sure with FPGA whether the data stream from the FPGA is correct. 

Thanks,

Poornima