(ADV7482)The resistor setting to use CVBS to MIPI-4Lane.

Hi,

Your question has been forwarded to the part specialist and will get back to you soon

Best Regards,

Jeyasudha.M

Hi  Jeyasudha.M

Thank you for your support everyday.

Can you help about this?

Best regards

Kawa

Hi,

Sorry for the delay. Checking again with part specialist

Best Regards,

Jeyasudha.M

Hi Jeyasudha.M

Can you help about this?

Best regards

Kawa

Hi Mike

Thank you for your reply.

I understood your situation.

Also I'll be back to my office next week so I'll try to output CVBS to MIPI-4lane side (I guess using 1lane only) at my Lab.

Anyway we can not make judge the register setting is all right or not so please tell me the right register information when you get the advice from the specialist.

Best regards

Kawa

Hi,

The part specialist is out of office this week. So he will look in to this next week

Best Regards,

Jeyasudha.M

Hi Kawa,

As Jeyasudha said the part specialist is out until next week but at a high level :-

I think in answer to Q1 the answer will be Yes.

To Question 2 what you are saying looks good but we'll need specialist to confirm or add more register writes.

Regards,

Mike

Hi Mike

Sorry, I had no time to check with our eval-board because I have another issue with other device.

Anyway, do you have any information for the register setting?

Best regards

Kawa

HI Jeyasudha.M

Thank you for your answer.

I will try this with our EVAL board next week.

I will feedback to you!

Best regards

Kawa

Hi,

Please find our expert answer below

Q1) Yes, a CVBS input can be output on the 4-lane MIPI CSI-2 transmitter (CSI-TxA).

Q2) Please find a script below that should work. Please try it on the evaluation board to confirm it works as expected.

:CVBS Input MIPI TxA 1-Lane Output:

E0 FF FF ; SW reset

delay 5  ;

E0 01 76 ; ADI Required Write

E0 00 30 ; Disable chip powerdown - powerdown Rx

E0 F2 01 ; Enable I2C Read Auto-Increment

E0 F3 4C ; DPLL Map Address Set to 0x4C

E0 F4 44 ; CP Map Address Set to 0x44

E0 F5 68 ; HDMI RX Map Address Set to 0x68

E0 F6 6C ; EDID Map Address Set to 0x6C

E0 F7 64 ; HDMI RX Repeater Map Address Set to 0x64

E0 F8 62 ; HDMI RX Infoframe Map Address Set to 0x62

E0 F9 F0 ; CBUS Map Address Set to 0xF0

E0 FA 82 ; CEC Map Address Set to 0x82

E0 FB F2 ; SDP Main Map Address Set to 0xF2

E0 FC 90 ; CSI-TXB Map Address Set to 0x90

E0 FD 94 ; CSI-TXA Map Address Set to 0x94

E0 0E FF ; LLC/PIX/AUD/SPI PINS TRISTATED

F2 0F 00 ; Exit Power Down Mode

F2 52 CD ; ADI Required Write

F2 00 00 ; INSEL = CVBS in on Ain 1

F2 0E 80 ; ADI Required Write

F2 9C 00 ; ADI Required Write

F2 9C FF ; ADI Required Write

F2 0E 00 ; ADI Required Write

F2 80 51 ; ADI Required Write

F2 81 51 ; ADI Required Write

F2 82 68 ; ADI Required Write

F2 03 42 ; Tri-S Output Drivers, PwrDwn 656 pads

F2 04 07 ; Power-up INTRQ pad, & Enable SFL

F2 13 00 ; ADI Required Write

F2 17 41 ; Select SH1

F2 31 12 ; ADI Required Write

E0 10 88 ; ADI Required Write

94 00 81 ; Enable 1-lane MIPI

94 00 A1 ; Set Auto DPHY Timing

94 DB 10 ; ADI Required Write

94 D6 07 ; ADI Required Write

94 C4 0A ; ADI Required Write

94 71 33 ; ADI Required Write

94 72 11 ; ADI Required Write

94 F0 00 ; i2c_dphy_pwdn - 1'b0

94 31 82 ; ADI Required Write

94 1E 40 ; ADI Required Write

94 DA 01 ; i2c_mipi_pll_en - 1'b1

delay 2  ;

94 00 21 ; Power-up CSI-TX

delay 1  ;

94 C1 2B ; ADI Required Write

delay 1  ;

94 31 80 ; ADI Required Write

End

Best Regards,

Jeyasudha.M