ADV7391 NTSC/Square Pixel_Color_Burst

Dear ADI support,

We use ADV7391 now.

We would like to set Color Burst mode. But it doesn't  output Color Burst.

Input Signal: NTSC / Square Pixel Mode

Output: CVBS

Current Setting:

0x17 : 0x02
0x00 : 0x1C
0x01 : 0x00
0x80 : 0x10
0x82 : 0xD1  
0x88 : 0x00
0x84 : 0x40
0x8A : 0x0C

Current Signal:

(1)Could you please advice us about setting register value if our current setting is wrong?

(2) Please send the real color burst signal on evaluation board if you can.

     We would like to know the better real color burst signal.

Best Regards, Kida

  • 0
    •  Analog Employees 
    on Apr 12, 2021 2:36 PM

    Hi,

     Please let us know the color burst you are verifying with test pattern or with NTSC input signal.

     As per table 79 and 80 in the ADV739x datasheet, your configuration are seems different. Please crosscheck your configuration according to the table for NTSC square pixel input.

    Note:  NTSC the nominal sync depth is 40 IRE and for PAL the nominal sync depth is 43 IRE.  If we are using 100% color bars then the color burst may peak at 120 IRE.
    Similarly to the nominal sync depth, 100% color burst range is 286 mV for NTSC and 300 mV for PAL.

    Thanks,

    Poornima

  • Dear Poornima-san,

    Thank you for your reply.

    We check color burst with test pattern.

    We checked and reviewed the register setting again.

    0x17 : 0x02
    0x00 : 0x1C
    0x01 : 0x00
    0x80 : 0x10
    0x82 : 0xD3h (*pedestal=Disable, we don't use pedestal.)
    0x88 : 0x00
    0x84 : 0x40
    0x8A : 0x0C
    0x8C : 0x55
    0x8D : 0x55
    0x8E : 0x55
    0x8F : 0x25

    As the above setting ,it display color bar, but color pattern is abnormal yet.
    Current mode is "SD pixel square mode" .Therefore CLKIN=24.54MHz.
    Can it support Color bar test mode at SD pixel square mode with CLKIN=24.54MHz?

    If it can support Color bar test mode at SD pixel square, please advise us any setting parameter.

  • +1
    •  Analog Employees 
    on Apr 19, 2021 11:43 AM in reply to IsshinKida

    Hi,

      Please let me know the whether you are generating the internal test pattern in square pixel mode ? I don't think its possible.

      Please note that 27 MHz clock signal must be applied to the CLKIN pin to generate the internal test patterns in ADV739x.

    Thanks,

    Poornima

  • Dear Poornima-san,

    Thank you for your reply. Noted, we understood that  it need to set CLKIN=27MHz for generating the internal test patterns in ADV739x.