ADV7280A-M MIPI output abnormal

Hi,

  As per expert comment "Video decoder digitizes the incoming analog video. It does not reverse or flip the image.
In some designs the processor may be needed to reverse the image depending on the input/camera usage. For example reversing camera vs. frontview camera"

 Please note that ADI does not have a chip to do this or any commercially available chips that does.  

Thanks,

Poornima

Dear Poornima,

         Thanks for replay, we debug this chip for days, we are very colsed to successfully get MIPI out with ADV7280A-M. 

Now only one confuse, during preview occasionally the image crash as below, can you advice the possible reason of this phenomenon.

Hi,

Please make sure with below things,

 1) Make sure whether ADV7280-M is programmed correctly with ADI recommended  I2C writes,

 2) Could you ensure that during power-up: the reset pin is held low for at least 5ms after the 3.3V, 1.8V and powerdown lines go high. After the reset pin goes high, wait for at least 5ms before starting I2C communication.

 3) After programming the ADV7280-M  could you please read the User Map register 0x0F. This should have the value 0x00.

 4) Can you ensure that there is no contention on the lines. i.e. that the backend processor could be trying to pull the line low as the ADV7280-M tries to output a MIPI clock.

 5) The backend processor is not configured correctly and it is pulling the clock lane low. Could you double check that the backend processor is configured correctly with latest software.

  Expert written an applications note describing the main issues interfacing the ADV728x with a MIPI receiver. Please refer the link here: https://www.analog.com/media/en/technical-documentation/application-notes/AN-1337.pdf
And also please check that the reset and power-down pins are controlled in the manner described in the datasheet "optimal power-up sequence" section.

Thanks,

Poornima

hi sir

  1)   we use recommended  I2C writes register as below:

##03_CVBS AUTODETECT, Progressive Out##

:I2P AUTODETECT CVBS Single Ended In Ain 1, 480p/576p MIPI Out:
delay 10 ; Wait 10ms After Hardware Reset To Start I2C
42 0F 80 ; Reset ADV7280A-M
delay 10 ; Wait 10ms
42 0F 00 ; Exit Power Down Mode
42 52 CD ; AFE IBIAS
42 00 00 ; INSEL = CVBS in on Ain 1
42 0E 80 ; ADI Required Write
42 9C 00 ; Reset Current Clamp Circuitry [step1]
42 9C FF ; Reset Current Clamp Circuitry [step2]
42 0E 00 ; Enter User Sub Map
42 80 51 ; ADI Required Write
42 81 51 ; ADI Required Write
42 82 68 ; ADI Required Write
42 17 41 ; Enable SH1
42 03 4E ; Power down unused pads
42 04 57 ; Power-up INTRQ pin
42 13 00 ; Enable ADV7280A-M for 28_63636MHz crystal
42 1D C0 ; Tri-State LLC output driver
42 FD 84 ; Set VPP Map Address [I2P]
84 A3 00 ; ADI Required Write [I2P]
84 5B 00 ; Advanced Timing Enabled [I2P]
84 55 80 ; Enable I2P [I2P]
42 FE 88 ; Set CSI Map Address
88 01 20 ; ADI Required Write [I2P]
88 02 28 ; ADI Required Write [I2P]
88 03 38 ; ADI Required Write [I2P]
88 04 30 ; ADI Required Write [I2P]
88 05 30 ; ADI Required Write [I2P]
88 06 80 ; ADI Required Write [I2P]
88 07 70 ; ADI Required Write [I2P]
88 08 50 ; ADI Required Write [I2P]
88 DE 02 ; Power up D-PHY
88 D2 F7 ; ADI Required Write
88 D8 65 ; ADI Required Write
88 E0 09 ; ADI Required Write
88 2C 00 ; ADI Required Write
88 1D 80 ; ADI Required Write [I2P]
88 00 00 ; Power up MIPI CSI-2 Tx [All ADV7280A-M Writes Complete]
End

 2) we power on the adv7280 when system boot up , we also measure in Oscilloscope 

there is no problem,  when we open the camera, just init  the recommended  I2C writes registers , and

there is no error when write register ;

3) Last ,this issue is not happened every time , when I open the camera dozens of times, it can produce one time !

hi sir

  1)   we use recommended  I2C writes register as below:

##03_CVBS AUTODETECT, Progressive Out##

:I2P AUTODETECT CVBS Single Ended In Ain 1, 480p/576p MIPI Out:
delay 10 ; Wait 10ms After Hardware Reset To Start I2C
42 0F 80 ; Reset ADV7280A-M
delay 10 ; Wait 10ms
42 0F 00 ; Exit Power Down Mode
42 52 CD ; AFE IBIAS
42 00 00 ; INSEL = CVBS in on Ain 1
42 0E 80 ; ADI Required Write
42 9C 00 ; Reset Current Clamp Circuitry [step1]
42 9C FF ; Reset Current Clamp Circuitry [step2]
42 0E 00 ; Enter User Sub Map
42 80 51 ; ADI Required Write
42 81 51 ; ADI Required Write
42 82 68 ; ADI Required Write
42 17 41 ; Enable SH1
42 03 4E ; Power down unused pads
42 04 57 ; Power-up INTRQ pin
42 13 00 ; Enable ADV7280A-M for 28_63636MHz crystal
42 1D C0 ; Tri-State LLC output driver
42 FD 84 ; Set VPP Map Address [I2P]
84 A3 00 ; ADI Required Write [I2P]
84 5B 00 ; Advanced Timing Enabled [I2P]
84 55 80 ; Enable I2P [I2P]
42 FE 88 ; Set CSI Map Address
88 01 20 ; ADI Required Write [I2P]
88 02 28 ; ADI Required Write [I2P]
88 03 38 ; ADI Required Write [I2P]
88 04 30 ; ADI Required Write [I2P]
88 05 30 ; ADI Required Write [I2P]
88 06 80 ; ADI Required Write [I2P]
88 07 70 ; ADI Required Write [I2P]
88 08 50 ; ADI Required Write [I2P]
88 DE 02 ; Power up D-PHY
88 D2 F7 ; ADI Required Write
88 D8 65 ; ADI Required Write
88 E0 09 ; ADI Required Write
88 2C 00 ; ADI Required Write
88 1D 80 ; ADI Required Write [I2P]
88 00 00 ; Power up MIPI CSI-2 Tx [All ADV7280A-M Writes Complete]
End

 2) we power on the adv7280 when system boot up , we also measure in Oscilloscope 

there is no problem,  when we open the camera, just init  the recommended  I2C writes registers , and

there is no error when write register ;

3) Last ,this issue is not happened every time , when I open the camera dozens of times, it can produce one time !

Hi,

 Could you please try the same by disabling an I2P and their related configuration also.

Thanks,

Poornima

hi sir

  could give me a register config list of  480p/576p MIPI Out for disabling an I2P ?  I have done it , but the camera can't  prievew ! Thanks 

Hi,

 Just disable the I2P configuration in register 0x55 - 84 55 00 and give the 480p/576p progressive input in source. Then keep the remaining configuration as same .

 Thanks,

 Poornima

hi sir

  It can't prievew, when I change the register 0x55 (0x80)  to 0x55 (0x00) , logcat display as flowing:

01-01 09:00:44.863  1557  5363 E ComipCamera: snapshot dqBuf: v4l2_dqbuf error,ret:1,Success
01-01 09:00:44.863  1557  5363 E ComipCamera: snapshot int android::BufferManager::v4l2_dqbuf(int, unsigned int*, v4l2_buf_type, v4l2_memory)(365)VIDIOC_DQBUF failed (3) times!
01-01 09:00:44.863  1557  5358 E ComipCamera: preview dqBuf: v4l2_dqbuf error,ret:1,Success
01-01 09:00:44.863  1557  5358 E ComipCamera: preview int android::BufferManager::v4l2_dqbuf(int, unsigned int*, v4l2_buf_type, v4l2_memory)(365)VIDIOC_DQBUF failed (4) times!

hi sir

 Oh, sorry!   I should config the size 720*288 when I disable the I2P !   But , I find the fps is still 50, I think it should be 25 fps ?  Can you explain this issue ? tks!

Hi,

Interlaced: In early days of television, interlacing was used to reduce the amount of information sent for each image. By transferring the odd-numbered lines, followed by the even-numbered line, the amount of information sent for each image was halved. So that  fps also be halved
 So for the resolution 720*288, when disable  the i2p the frame rate should be 25 fps.

Note: I2P works by 'line-doubling' i.e. outputting the same line twice and doubling the MIPI CSI-2 clock speed. Please note that In interlaced mode the ADV7282-M outputs with a 216 Mbps data rate (MIPI clock frequency 108 MHz).
In progressive mode (i.e. I2P mode on) the ADV7282-M outputs a 432 Mbps data rate ( MIPI clock frequency 216 MHz).

Thanks,

Poornima

hi sir

     -01 08:16:59.260  1548  5677 D CameraHardwareComip: preview frames : 608, fps : 50
01-01 08:17:02.280  1548  5677 D CameraHardwareComip: preview frames : 759, fps : 50
01-01 08:17:05.300  1548  5677 D CameraHardwareComip: preview frames : 910, fps : 50
01-01 08:17:08.320  1548  5677 D CameraHardwareComip: preview frames : 1061, fps : 50
01-01 08:17:11.340  1548  5677 D CameraHardwareComip: preview frames : 1212, fps : 50
01-01 08:17:14.361  1548  5677 D CameraHardwareComip: preview frames : 1363, fps : 50
01-01 08:17:17.380  1548  5677 D CameraHardwareComip: preview frames : 1514, fps : 50
01-01 08:17:20.400  1548  5677 D CameraHardwareComip: preview frames : 1665, fps : 50
01-01 08:17:23.421  1548  5677 D CameraHardwareComip: preview frames : 1816, fps : 50
01-01 08:17:26.440  1548  5677 D CameraHardwareComip: preview frames : 1967, fps : 50
01-01 08:17:29.460  1548  5677 D CameraHardwareComip: preview frames : 2118, fps : 50
01-01 08:17:32.479  1548  5677 D CameraHardwareComip: preview frames : 2269, fps : 50
01-01 08:17:35.500  1548  5677 D CameraHardwareComip: preview frames : 2420, fps : 50
01-01 08:17:38.520  1548  5677 D CameraHardwareComip: preview frames : 2571, fps : 50
01-01 08:17:41.539  1548  5677 D CameraHardwareComip: preview frames : 2722, fps : 50
01-01 08:17:44.560  1548  5677 D CameraHardwareComip: preview frames : 2873, fps : 50
01-01 08:17:47.579  1548  5677 D CameraHardwareComip: preview frames : 3024, fps : 50
01-01 08:17:50.599  1548  5677 D CameraHardwareComip: preview frames : 3175, fps : 50

  I change the mipi clk 108M , but the fps is still 50  in disabled i2P mode ？ what should I do? 

                                                                                                                             tks

second problem, camera prievew is still blurred screen when I disable I2P !

hi sir

   I have another question, config 720*288 camera can prievew  but config 720*576 camera can't prievew when disable I2P, so I think threre are some other differences in register config between 576i and 576p !  Do you think so!

Hi,

  Please make sure with register 0x5B as 0x80 for interlaced format -i.e Need to disable the advanced timing mode register when I2P is not used.

 For 576i (When disable I2P), As we already stated, In interlaced mode,the format would be separated as odd and even field 288 odd +288 even, this is the reason why the camera can able to preview the format 720*288.
 Also note that each frame of video consists of an even and an odd field. You would probably measuring the field rate rather than the frame rate. 

Thanks,

Poornima