ADV7842 LLC Phase Adjustment Test

Hi Guenter.

I probed directly at the input of TFP410.

Tsu = 1.2ns (min.) and Th = 1.3ns (min.).

Tracks are perfectly length matched so we just have the propagation delays of the components we discussed before.

If they all fit in the typical values, there's a very good chance bits are closely aligned and this may explain why I don't see disturbances. Do you agree?

What kind of disturbances should I see? An image glitch, video noise or sync loss?

I thought about trying to replace one of the many isolators in the pixel bus by wiring connections, in a way to force a delay change in the bus and see that happens.

Thanks.

I am surprised you don't see any video problems at one of steps.  Not a problem, just surprised.

Given that the TFP410 latches the incoming data on the rising edge of clock, measuring at the TFP410 inputs, I would adjust the ADV7842 phase until the the clock rising edge is in the middle of any data transitions.

Regarding what kind of disturbance I'd expect:

1) loss of V or H sync.  lock issue to the sync pulse, causing by pixel clock jitter of the sync pulses

2) pixel twinkling or noise.

If you select the wrong phase step (where clock and data transitions overlap) the problems may show up over temperature or voltage drift. 

Bottom line is to adjust the clock edge to the middle of the data transition measured at the TFP410 input pins and you should be safe.

Hi Guenter.

As I mentioned before, I was planning to replace one of the isolators by wiring connections to force a delay change and see the effects of the phase adjustments. I did it in this way:

Now all the bits of the Pixel Bus are closely aligned, expect for b0 and b1.

Then I could finally observe the effects of the phase control register.

For some values, I got a perfect image. For others, pixel noise like shown below and sometimes the GStreamer pipeline just closed probably because of sync loss.

Thank you.