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The acceptable voltage of negative voltage spilke with short time below -0.3V(30ns every 10us), without causing latch-up and degradation and failure for ADV7182&ADV7182A?

If the duration of negative voltage spike below -0.3V is very short(30ns every 10us),what will be the acceptable voltage of the negative voltage spilke without causing latch-up and degradation and failure for ADV7182&ADV7182A?

Please help to reply as soon as possible, our project schedule is very tight. Thans you very much!!!!!!

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  • Thank you very much for the reply!!!

    What are the requirements of voltage,current,duration and other related factors for triggering the latch-up of ADV7182&ADV7182A?

    Should we worried about the latch-up issue when we us ADV7182&ADV7182A?

    In practice, I have not seen an example of even a IC latch-up.

    Is it rare to see  the phenomenon of ADV7182&ADV7182A latch-up in practice?

    What is the ratio?

    What is the reason?

    Look forward to your reply, Our project schedule is very tight. Thanks agin!!!

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