I wanted a 640x480p @30Hz input video resolution for my application. I have the required video timing parameters and have generated the EDID for the same. When I probe the signals in FPGA using ILA I am observing that the video from the ADV7611 gives 1200+ data valid (data enable) for a single line. The expected data valid is 640 (as per standard video timing). I tried 640x480 @60Hz and it was giving proper data i.e. 640 valids per line. Hence am not sure if ADV7611 supports 640x480p @30Hz. Similar behavior is observed for 600x600 @30Hz. Could you let me know if 640x480p @30Hz and 600x600p @30Hz resolutions are supported by ADV7611. If yes can you share the register settings for the same.
This is the only method to increase the pixel clock from source to meet the HDMI spec.
Unless you can't transmit 640×480@30Hz in HDMI interface.
Please note that as I already stated,