ADV7611 - 640x480p 30Hz and 600x600p @30Hz support

Hello,

I wanted a 640x480p @30Hz input video resolution for my application. I have the required video timing parameters and have generated the EDID for the same. When I probe the signals in FPGA using ILA I am observing that the video from the ADV7611 gives 1200+ data valid (data enable) for a single line. The expected data valid is 640 (as per standard video timing). I tried 640x480 @60Hz and it was giving proper data i.e. 640 valids per line. Hence am not sure if ADV7611 supports 640x480p @30Hz. Similar behavior is observed for 600x600 @30Hz. Could you let me know if 640x480p @30Hz and 600x600p @30Hz resolutions are supported by ADV7611. If yes can you share the register settings for the same.

Thank you,

Ronston

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  • 0
    •  Analog Employees 
    on Aug 10, 2020 7:04 AM 5 months ago

    Hi,

    640x480p@30Hz,600x600@30Hz the pixel clock would be less than 25Mhz. In HDMI mode, video formats with TMDS rates below 25 M pixels/sec require pixel repetition in order to be transmitted over the TMDS link. When the ADV7611 receives this type of video format, it discards repeated pixel data automatically, based on the pixel repetition field available in the AVI InfoFrame. Please refer Page38 at ADV7611 Reference Manual (UG-180)

    HDMI requires a pixel clock above 20MHz.You need to turn on pixel repetition to get the TMDS clock to get the clock high enough to meet HDMI spec.

    Note: Pixel repetition is used to get the TMDS clock above the spec'd minimum of 20MHz.  When using pixel repetition the sink would need to ignore the duplicated pixels to get back down to a original format.  Note the AVI infoframe carries the pixel repetition information so the sink can respond correctly.

    Thanks,

    Poornima

  • Hello Poornima,

    Thank you for the reply.

    From the reply what I understood is that the ADV7611 does not support pixel frequency below 20MHz. Hence when any video with pixel clock below 20MHz is received it divides the clock until the frequency reaches above 20MHz and similarly repeats the input data twice (which is discarded by default). But as I was receiving 1280 valids (approx) instead of 640 can I assume that the repeated data is not being discarded? Will discarding it give me 640 valid data per line but at a clock of 26MHz instead?

    For clarification please consider the following case:

    For 640x480p @30Hz, the input pixel clock is 13MHz. Will the pixel repition done by ADV7611 convert this to 26MHz and then give this clock as output? Or will the clock frequency output from the ADV7611 remain 13MHz itself? And you could also tell me whether the data will remain on the line for 2clock cycles of the output clock ?

    Is there any script for configuring the ADV7611 to 640x480p @30Hz which will give me 13MHz clock and 640 valids? Do you know of any methods which can achieve this without any external help as it would be really helpful if I can generate it using ADV7611.

    Thank and Regards,

    Ronston

Reply
  • Hello Poornima,

    Thank you for the reply.

    From the reply what I understood is that the ADV7611 does not support pixel frequency below 20MHz. Hence when any video with pixel clock below 20MHz is received it divides the clock until the frequency reaches above 20MHz and similarly repeats the input data twice (which is discarded by default). But as I was receiving 1280 valids (approx) instead of 640 can I assume that the repeated data is not being discarded? Will discarding it give me 640 valid data per line but at a clock of 26MHz instead?

    For clarification please consider the following case:

    For 640x480p @30Hz, the input pixel clock is 13MHz. Will the pixel repition done by ADV7611 convert this to 26MHz and then give this clock as output? Or will the clock frequency output from the ADV7611 remain 13MHz itself? And you could also tell me whether the data will remain on the line for 2clock cycles of the output clock ?

    Is there any script for configuring the ADV7611 to 640x480p @30Hz which will give me 13MHz clock and 640 valids? Do you know of any methods which can achieve this without any external help as it would be really helpful if I can generate it using ADV7611.

    Thank and Regards,

    Ronston

Children
  • 0
    •  Analog Employees 
    on Aug 11, 2020 9:13 AM 5 months ago in reply to Ronston

    Hi,

      1. Will the pixel repetition done by ADV7611 convert this to 26MHz and then give this clock as output?

        No ADV7611 can't convert to 26Mhz, it can only discards the repeated pixel data automatically, based on the pixel repetition field available in the AVI InfoFrame, this could be done on source/Generator side. Or else you can't transmit over HDMI interface as per specification.

      2. Or will the clock frequency output from the ADV7611 remain 13MHz itself?

          Yes. Please let us know your Tx(Transmitter) chip.

     3. And you could also tell me whether the data will remain on the line for 2clock cycles of the output clock?

        Yes only when below 20MHZ, then the sink will drop extra pixel to get back to the correct pixel rate.

    Note: As per HDMI specification, HDMI cable require above 25MHZ pixel clock to be transmitted over the TMDS link.


    Thanks,

    Poornima

  • Hi Poornima,

    Thank you for the inputs.

    The video path is as follows:

    CPU --> ADV7611 --> FPGA --> ADV7511 --> Display.

    My register set configuration for the ADV7611 is as follows. It would be really helpful if you can suggest any changes needed to it for getting the actual video from the ADV7611 in the case where the clock is lower than 20MHz. I am able to get proper data using this configuration for remaining cases where my pixel clock is higher than 20MHz.

    {
    {0x98, 0x00, 0x05}, 
    {0x98, 0x01, 0x06}, 
    {0x98, 0x02, 0xF0},
    {0x98, 0x03, 0x40},
    {0x98, 0x04, 0xA2},
    {0x98, 0x05, 0x28},
    {0x98, 0x06, 0xA7},

    {0x98, 0x0B, 0x44},
    {0x98, 0x0C, 0x42},
    {0x98, 0x14, 0x7F},
    {0x98, 0x15, 0x80},
    {0x98, 0x19, 0x83},
    {0x98, 0x20, 0xF0},
    {0x98, 0x33, 0x40},

    {0x44, 0x6C, 0x00},
    {0x44, 0xBA, 0x01},

    {0x64, 0x40, 0x81},

    {0x68, 0x9B, 0x03},
    {0x68, 0x6F, 0x08},
    {0x68, 0x85, 0x1F},
    {0x68, 0x87, 0x70},
    {0x68, 0x57, 0xDA},
    {0x68, 0x58, 0x01},
    {0x68, 0x03, 0x98},
    {0x68, 0x4C, 0x44},
    {0x68, 0xC1, 0x01},
    {0x68, 0xC2, 0x01},
    {0x68, 0xC3, 0x01},
    {0x68, 0xC4, 0x01},
    {0x68, 0xC5, 0x01},
    {0x68, 0xC6, 0x01},
    {0x68, 0xC7, 0x01},
    {0x68, 0xC8, 0x01},
    {0x68, 0xC9, 0x01},
    {0x68, 0xCA, 0x01},
    {0x68, 0xCB, 0x01},
    {0x68, 0xCC, 0x01},
    {0x68, 0x00, 0x00},
    {0x68, 0x83, 0xFE},
    {0x68, 0x6F, 0x0C},
    {0x68, 0x85, 0x1F},
    {0x68, 0x87, 0x70},
    {0x68, 0x8D, 0x04},
    {0x68, 0x8E, 0x1E},
    {0x68, 0x1A, 0x8A},
    {0x68, 0x57, 0xDA},
    {0x68, 0x58, 0x01},
    {0x68, 0x6C, 0xA1}

    };

    Thanks and Regards,

    Ronston

  • 0
    •  Analog Employees 
    on Aug 12, 2020 11:07 AM 5 months ago in reply to Ronston

    Hi,

     Could you please configure the below register in ADV7511 as

        72 3b CA.

    Please note that in the manual pixel repeat selection case, the VIC sent in the AVI info frame will need to be set in register 0x3C so configure according to your resolution.

    The multiplication of the input clock must be programmed in 0x3B[6:5], and the pixel repeat value sent to the Rx must be programmed in 0x3B[4:3]. Refer section 4.3.4 at ADV7511W Programming Guide

    Also let us know the readback below register from ADV7611.

      68 05

    Thanks,

    Poornima

  • Hello,

    Sorry I was tied up with some other work.

    Currently I don't want to make any changes to ADV7511 register configuration. I am internally generating the video for the ADV7511 using XIlinx IP's.

    My concern is regarding ADV7611. I am not sure if it was a typo form your side for the following statement

    " Could you please configure the below register in ADV7511 (Did you mean ADV7611) as 72 3b CA."

    Awaiting your confirmation for the same.

    The readback from 68 05 register of ADV7611 should be done after the EDID configuration or before. Just wanted to confirm.

    Thanks and Regards,

    Ronston

  • 0
    •  Analog Employees 
    on Aug 17, 2020 9:13 AM 4 months ago in reply to Ronston

    Hi,

     That is not an typo, If you changed in ADV7511 Tx side, then the source will send the data according to that.

    The readback from 68 05 register of ADV7611 should be done after the EDID configuration or before. Just wanted to confirm.

       After EDID configuration.

    Thanks,

    Poornima