we am using the adv7842 as HDMI input in our devices.
With one specific video source, we have the issue that the adv7842 DCFIFO can not lock (0x68, 0x1C = 0).
The TMDS_PLL is locked (0x68, 0x04 = 1) and also the LINE_WIDTH and FIELD_WIDTH (640x480) are shown correctly in the HDMI Tab.
When connecting the video source to a monitor, it woks fine. It also works, when connecting the sourct to a Lontium HDMI receiver.
I have also tried to connect the video source to the adv7842 Eval Board using the HDMI scripts. The results are the same, there is no DCFIFO lock.
When meassuring the TMDS clock at the input, it seems that the clock has some kind of low frequency modulation/jitter on it, compared to other video sources.
I guess this is the reason for this issue.
I would appreciate som help to solve this issue.
If you see any image disruption, in that case "Suggestion from the expert was to disable the DC_FIFO and forcing the source video to be 8-bits" by completely bypass the CP - 0xBF CP_COMPLETE_BYPASS_IN_HDMI_MODE = 1, but we have not tried this. Please refer here https://ez.analog.com/video/f/q-a/9795/adv7619-input-tmds-clock-modulation/5372#5372
ADV7842 has an incoming video FIFO to handle some of the TMDS clock jitter when the video is processed by the Component Processor. The video FIFO is used to pass data safely across the clock domains. The video FIFO provides immunity to the incoming jitter and it is designed to operate completely autonomously. However, it is also possible for the user to observe and control the FIFO operation with a number of FIFO status and control registers. For more details refer Section 8.19 in UG-214: ADV7842 Hardware User Guide
Note: If the modulation frequency is ~1Hz then you will be able to see this on the scope. If the modulation frequency is 10kHz then the scope will just show a clock with lots jitter. 1Hz the chip pll can handle, 10kHz may cause issues.
I could not find the register (CP_COMPLETE_BYPASS_IN_HDMI_MODE) in the adv7842 Hardware/Software manual.
Is there a similar register for the ADV7842?
The modulation frequncy is rather slow. I can clearly see the frequency modulation on the scope.
The video source is an Rohde&Schwarz measuring device (HMO3525) with DVI output. One of our custommers has the same problem when using a R&S device as video source. When using standard monitors, it works fine.
I expect this to be a standart DVI output, but I cannot say for sure.
Are there any other register settings I could try?
If not, would it help to have a HDMI retimer (with jitter cleaning), connected bofore the AD7842?
Hi,I could not find the register (CP_COMPLETE_BYPASS_IN_HDMI_MODE) in the adv7842 Hardware/Software manual. Is there a similar register for the ADV7842 ? Yes, CP bypass register is not available in ADV7842. Instead of that can you try BYPASS DPP and let us check whether we see any improvement.If not, would it help to have a HDMI retimer (with jitter cleaning), connected before the AD7842 ? But We haven't tried this.Thanks,Poornima
The DPP is already bypassed.
Are you seeing any image disruption because of this jitter?