AD98xx  eval software I2C read bug when using LPT

Hi,

I seems that in  DEPLEvalCustSetup.exe, used to evaluate many of AD98xx may have  the following problem :

In read mode , using the LPT port ,  I noticed that after the  IC received the register address , ( IC gives a ACK bit),  the  software is missing some delay before sending the new rising clock edge.  If  MSB  of  targeted register is a '1' , any I2C bus analyser will see that clock edge rising before the IC output the data to high is interpretated as  <STOP> .

Is it a true bug  ?    (see picture)

Thanks for your answers,

Steve

Parents
  • Hi Dave,

    Sorry for the delay as well,

    actually there is only the AD9888 and the I2C controller.

    In fact the AD9888  respond correctly , probably the AD9888 compensate for timing skew between SDA/SCL internally so from software point of view , it is working. But looking with I2C analyser the SDA/SCL seems to not be correct.This is only with LTP case, on the read instruction only. Might be a missing delay in the software routine.

    Thanks a lot.

    Steve

Reply
  • Hi Dave,

    Sorry for the delay as well,

    actually there is only the AD9888 and the I2C controller.

    In fact the AD9888  respond correctly , probably the AD9888 compensate for timing skew between SDA/SCL internally so from software point of view , it is working. But looking with I2C analyser the SDA/SCL seems to not be correct.This is only with LTP case, on the read instruction only. Might be a missing delay in the software routine.

    Thanks a lot.

    Steve

Children
No Data