I want to use ADV7343 in my design.
The mode is SD Only, 8-Bit, 4:2:2 YCrCb Pixel Input Mode to S[7:0],PAL or NTSC mode with R/G/B,CVBS/Y/C output.
By the timing Figure 106 or 107 in datasheet, I could not find the detail timing description with S_HSYNC and S_VSYNC .
Like the relationship between them and pixel data, and how long they need to stay low or high within one horizon time(864 or 858).
By the way. I want to confirm the SD Only, 8-Bit, 4:2:2 YCrCb Pixel Input Mode need to use 54Mhz clock rate, is it right?
Any body know that?
Very king of your answer.
Timing diagram for SD Mode has provided detail in Page13 of datasheet.
Standard definition (SD) YCrCb data can be input in an interleaved 4:2:2 format on an 8-bit bus at a rate of 27MHz.
In SD (YCrCb) mode, the format of the input data is determined by Subaddress 0x88, Bits[4:3]. Refer Table 29.
Thanks for your answer.
But in the Page13 Figure 2 there is still not have any detail information about what I concerned.
I want to know the sync time they need to stay and the relative time between them and pixel data of my picture.
Please refer attached video demy5. There you might get detailed information about timing information with pixel data.
I'd read it. The book is very useful, but it's too thick for me to find it. Could you please tell me which part of the book I can find that?
The mode I need in my design is SD PAL or SD NTSC.
Please refer section - video signal overview, there they would provide the video timing information.