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Improving signal strength on AD9880

We're using the AD9880 in a design and we find that we are seeing issues on our prototypes which seem to be related to TMDS signal strength. An example setup which shows the problem particularly badly is:
Lenovo X301 DIsplayport output > DP to DVI adaptor > 2m DVI cable > AD9880
Running at 1080p60 (148.5MHz pixel clock) using a generic DVI cable.
We see two kinds of error, one is 'sparkles' - occasional pixels which are the wrong colour and the other is that we sometimes get vsync and hsync signals at the wrong times.
Switching the cable out for a high-quality, thick gauge alternative seems to make the problem much better, but with such a short run, I would hope that this isn't necessary.
Of the 20 units we've tested, the extent of the issue is very varied, the worst examples have such frequent sync signal errors that the image is unusable and the better ones show only a few sparkles per minute and are almost perfect. The same effect can be seen by replacing the AD9880 on a partcular PCB and seeing that the severity of the problem varies significantly, even over devices in the same batch.
Similarly, some video sources are better than others, in particular it seems that laptops with integrated graphics are bad, whether they have default Displayport or HDMI output. The Lenovo X301 is one such bad example, using the Intel GS45 chipset, but the Dell E6400 which uses the GM45 chipset and an extra Nvidia graphics processor is just fine.
We can see the errors on the output of the AD9880 using a scope, so we are fairly sure that the problem is not to do with reception of data later on in the system, but for reference, the 9880 is driving into a Xilinx Spartan 6 LXT using 1v8 I/O.
We have tried experimenting with the PLL registers 0x4D, 0x4E and 0x4F, but they don't seem to fix the problems. Are there any other register settings we can try to improve the reception quality before resorting to looking at hardware changes?
Thanks
James.
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  • Guenter,

    The errant sync pulses occur throughout the frame at random periods, however i'm attaching a scope shot that shows both the hsync and vsync glitches while DE should be active, not shown but the hsync and vsync are negative polarity and the glitches occur during the high side of both syncs.

    Rolland

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  • Guenter,

    The errant sync pulses occur throughout the frame at random periods, however i'm attaching a scope shot that shows both the hsync and vsync glitches while DE should be active, not shown but the hsync and vsync are negative polarity and the glitches occur during the high side of both syncs.

    Rolland

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