I ran into a problem with AD9398 chip and I was wondering if somone could help me out with it.
Here it is,
I am having problem with SONY (HVR-HD1000J) camera as source for my HDMI capture board
During connection to the AD9398 HDMI receiver, SONY camera starts to continiously read EDID in a loop.
As a result AD9398 cannot properly detect format of the input signal.
Our other developers have ran into a similar problem with a diffierent Sony camera.
I have tried several other cameras (JVC, Panasonic), all of them work fine with the chip.
We also have another device with HMDI input but it uses ADV7441 to do processing of video signal.
With ADV7441 this particular Sony camera works perfectly. Both devices have same EDID. Hence we figured that the problem could be the ROM that contains the EDID. ADV7441 has an internal ROM that stores its EDID while AD9398 does not, so we are forced to use external one. In turn we tried using AD9398 with EDID stored in ADV7441 internal ROM that did not work, the problem persisted.
After extensive trial and errors we think that the problem is TMDS clock interface.
During our experiments we noticed that if we cut TMDS off completely, our other cameras still read EDID correctly despite the absence of TMDS signals. Whilst with Sony camera I2C wires are silent when HDMI is connected and TMDS signals are cut off.
Is there some physical difference in the TDMS interface between AD9398 and ADV7441A?
Maybe suggest what the problem could be.
This sounds like a very interesting problem. As you point out, the AD9398 works with all of your other camera gear, so there must be something in the protocol or timing of the Sony that is at issue. When you monitor the EDID reading, what speed is the I2C clock? Can you verify that it is the EDID it is trying to read and not the HDCP keys? I don't know about the Sony HVR-HD1000J, but some sources (DVD players - especially blu-ray) will not carry on with the connection if there is no HDCP protection. It really isn't a matter of the material being protected (such as a commercial DVD movie), it is just that some sources have taken the position that they will not output any unprotected content. Your report that the TMDS link is not active would support such a scenario.
So, try to verify if this is the EDID (address 0xA0) they are reading or if it is the HDCP link internal to the AD9398. They both connect via the DDC lines. If you do not have HDCP keys and this is the problem, you might try substituting an AD9381 - the same chip but with internally progammed HDCP keys.
Thanks for the lightining fast reply,
We have thought about possibility of HDCP protection, but in our case when we are using ADV7441 everything works and we are 100% sure we are not using HDCP keys in ADV7441 either, we simply don't have them. So both ADV7441 and AD9398 do not have HDCP keys, ADV7441 works, AD9398 does not.
We also did following test, we cut off internal ROM of ADV7441 and instead connected the external ROM that we use for storing EDID for AD9839. Then we connect Sony camera to ADV7441, EDID is correctly read from external ROM and device is fully operational. Thus we can safely say the problem is not external ROM now. Somehow TMDS interface affects how Sony camera reacts, if TDMS signal is not present Sony camera simply stays silent and does not even attempt to read EDID. We also made sure that TMDS signals have 50 Ohm resistance as specified in standard.
We are at a loss of what to try next.
The TMDS signal is supplied by the source - the Sony camera, so the decision is from that. Since you have confirmed the EDID works well in the ADV7441A, then we can move on to other approaches.
What does your pull-up look like on the AD9398 board? Do you run through a level shifting FET in this? The HDMI testing spec is very tight on how much capacitance the DDC lines can have - 50pF. I don't know how or if this would alter the Sony camera from reading, but it might be an area to look at. If you like, you can post the schematic fo the receiver front end. Let me know if you prefer to do this in a PM.
In our testing of sinks (HDMI Rx), we found that most FETs by themselves contribute over 30pF of input capacitance; this doesn't leave much for the board and other circuitry. Also, somtimes it is not the best choice to mix the HDMI_5V which is sent from the Tx with the other on-board supplies. This can also affect the DDC line capacitance.
Thank you for prompt replies, Chris.
I am attaching schematic of our AD9398 section of the board for your review.
About DDC, DDC is related to HDCP and I2C, we are pretty sure that I2C is not the problem. We connected external ROM to ADV7441 using regular wires which i am sure made capacitance way over 50pF , yet it still works with ADV7441.
That looks very clean. The only thing I would suggest might be an issue or question would be the C2 cap from DDC5V to ground. I don't know if that will affect the DDC lines that are pulled up to that or not. Try removing that capacitor and see if it will read properly.