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AD9889 video noise on the display

I got the AD9889 HDMI transmitter working, but I see noise on the display. I generate a color bar as a source image, I see a couple of verticle noise striped on some of the colors. If I wiggle the HDMI cable the noise changes.

I started playing with the register settings and first I noticed that the set provided on the web doesn't work. It also does not match the programming guide documentation. One example is register 0x98. The documentation says must write a 7 to this register. The example code says write 178. But I only got a display working by writing a 170. Registet 0xAF also affects the noise on the display. A value of 6 works best, while a value of 4 makes the video break up once in a while. And last but not lease, I had to increase the drive strength registers 0xA2 and 0xA3 to 255 to minimize the noise on the display.

My resolution is 1280x1024, 108MHz clock, 60Hz frame.

Can someone provide me a register settings that work for this resolution that is different than the one available from the web?

I'm attaching the register setting programming that gives me the best results. This is a read back from all registers.

Thanks,
Ed.

best_settings.txt.zip
  • Hi Ed,

    I assume you're talking about the AD9889B. Do you have an evaluation board for this device?

    Regards,

    Matt

  • Yes, the AD9889B. No, I don't have an evaluation board. Could you send me schematics/layout pcb file for the evaluation board. I'm also using a micro-hdmi connector, so the layout had to go through vias from the chip to the connector. Do you think that could be the issue? But there's no other way to connect the chip to the micro connector, only through vias.

    Did you have a chance to take a look at the register setting I attached to the message?

    Thanks,

    Ed.

  • Hello Ed,

         I have looked over the register settings you provided and have a couple of suggestions. However, before that I would support Matt's opinion that there is either a layout or assembly issue at the base of this. There should not be any reason for moving the cable to alter any noise unless the connector is not securely attached or if the cable is intermittent.

         As to register suggestions:

              I notice in R0x42 that there is no bit 5 present. This is the MSEN or monitor sense, and the Tx is expecting to see termination via the Rx on the TMDS lines. If this is '0', I would suspect an issue in either the cable or the sink itself.

              R0x98 should be 0x07 - this affects the TMDS PLL, and setting the MSB places this into a manual frequency range mode that should not be necessary for you.

              R0xA2 and R0xA3 should both be 0x87, not the 0xFF in your register dump. There may have been a typo in our presets file that listed this as d87, but hex 87 is what belongs there.

              R0xAF - you have this set for DVI, not HDMI - if HDMI is what you want, then change this to 6.

              R0xBA - with 0xE0 programmed in this, you have selected the negative edge for data capture. If you continue to have issues, you might try setting this to 0x60 for the positive edge.

              R0xC9 - I didn't see this in your dump, but you would want this to be 3 for trying to read the EDID 3 times.

    Best,

    Chris

  • Hi Ed,

    We'll take a look at your register settings, but this sure sounds like a PCB layout issue. Have you done any compliance testing or impedance measurements on this PCB?

    Regards,

    Matt

  • I'll look into the register value suggestions you sent me. I'm going to the lab right now to try them out and see what happens. In the meantime, I'm attaching a screen capture of the layout and our schematics page. Notice how the traces are very short and matched in length. The high speed serial pairs are highlighted. Note that they have to go through two vias each to be able to route it to the micro-HDMI. We also performed Hyperlinx simulation of our whole board, so the signals were checked for impedance matching and crosstalk noise. I'll try to get a picture of the color bar noise patterns I see on the screen.

    On the schematics there is a correction. R490 is removed and R141 is populated.

    Let me know if you have any comments on the layout or schematics. Specifically the way we did the analog supplies. It comes from a switcher, not an LDO. But we used a pi filter to reduce the digital noise.

    Thanks,
    Ed.

  • Ed,

    What's the part number on the mini-HDMI connector?

  • I checked the new register settings. It makes no difference. The only difference I see is on the drive strength registers 0xA2, 0xA3. If I program to 0x87, it gets worse. If I leave it at 0xFF, it gets better. It almost indicates that it want maximum signal strength on the cable.

    I also tried a difference cable. I used a micro-to-full HDMI adapter, and then a very thick and expensive HDMI cable. It was actually more noisy than using a thin micro-to-full HDMI cable.

    I want to understand more about the register 0x42 bit 5 that's not set. What does it mean? Do I need a termination on the board?

    Let me know if you see any issues on the layout and schematics I sent.

    Ed.

  • Another detail. The board boots up setting register 0x98 to 170 (decimal). When I program just this register to 0x7, the video goes away. I have to program registers 0xaf to 0xb9 to regain the video.

    Ed.

  • Hi Ed,

         I looked over your schematic and layout and I don't have much experience with the micro-HDMI connectors, but that isn't the optimum layout with the different channels crossing over each other. That could lead to noise in the system. It appears you are taking great pains to keep the trace lengths the same - I don't think that is all that important in this, since you are very close in any case. The TMDS receivers are remarkably adept at managing unequal length (channel to channel - not within the differential pair). I would try to manage the layout with as few vias a possible and less cross-overs.

         In the schematic, I might have missed it on another page, but the HPD signal should run from the HDMI connector to the AD9889B. The idea behind HPD is that the TX supplies +5V on the connector and the RX has a 1K ohm resistor from that +5V returning on the HPD line. I see that pin 19 of the connector is not connected, and this should be the HPD return line. There is a signal on the HPD pin (DVI_HTPLG), but this ought to be from the connector HPD signal. In this same vein, the DDC lines should be connected to the HDMI connector as well. They are used to read the EDID of the monitor so that the TX only sends signals that the RX can receive - not beyond it's ability.

         Other than that, I don't see anything that is out of the ordinary in this layout and design.

         I do have question for you about the value of R0x98, in another post you indicated that it is programmed to d170 on power up - is this what you are seeing as the default value for this? Or is your driver writing this to it? It is my experience tha this defaults to 0.

    Best,

    Chris