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AD9388A Not Recommended for New Designs
The AD9388A is a high quality, single-chip graphics digitizer with an integrated 2:1 multiplexed HDMI® receiver. The AD9388A contains one main component...
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problem about AD9388A to input VGA 1600X900P60

		
	
				

			

									
					    hangzhou_01
					
							

            
            			
				
									
											
			
			
				
			
			
			    	
			                    
                
				                on Jan 12, 2020 
				
			
			
		

		
		                     
				
        		

		    
		    		    
		    			

			    
hi,we have problem to use ad9388 in VGA 1600X900P60,like this :


 


the registers config is:


 /* :  1600x900 _@ 60 108.000MHz Out 16bit YUV EAV/SAV: */
    {I2C_ADV7441_USER_MAP, 0x03, 0x0C}, /* Disable TOD */
    {I2C_ADV7441_USER_MAP, 0x05, 0x02}, /* Prim_Mode =0110b for HDMI(GR) */
    {I2C_ADV7441_USER_MAP, 0x06, 0x07}, /* vid_std = 01100b */
    {I2C_ADV7441_USER_MAP, 0x1D, 0x40}, /* Disable TRI_LLC */
    {I2C_ADV7441_USER_MAP, 0x37, 0x01}, /* PCLK Polarity */
    {I2C_ADV7441_USER_MAP, 0x3C, 0xA8},     /* SOG Sync level for atenuated sync,*/


    {I2C_ADV7441_USER_MAP, 0x47, 0x0A}, /* Enable Autotmatic PLL_Qpump and VCO Range*/


    {I2C_ADV7441_USER_MAP, 0x68, 0xF0}, /* Auto CSC ,YUV Out */
    {I2C_ADV7441_USER_MAP, 0x6B, 0xD3}, /* Select 422 16 bit YPrPb out from
                                           CP.656 enabled. DE enable*/
    {I2C_ADV7441_USER_MAP, 0x7B, 0x0F}, /* TURN ON EAV & SAV CODES */


    {I2C_ADV7441_USER_MAP, 0x81, 0xDA}, /* TURN ON AV CODE IN AUTO GR */



    {I2C_ADV7441_USER_MAP, 0x87, 0xE7}, /* Enable Manual PLL Divider Ratio
                                           0x708 = 1800 */
    {I2C_ADV7441_USER_MAP, 0x88, 0x08}, /* Set PLL Divider */
    {I2C_ADV7441_USER_MAP, 0x8F, 0x01}, /* Set Free Run Line Length 0x1DD=477 */
    {I2C_ADV7441_USER_MAP, 0x90, 0xDD}, /* Set Free Run Line Length */
    {I2C_ADV7441_USER_MAP, 0xAB, 0x3E}, /* Set Line Count Max 0x3E8 = 1000 */
    {I2C_ADV7441_USER_MAP, 0xAC, 0x80}, /* Set Line Count Max */
    {I2C_ADV7441_USER_MAP, 0xBA, 0xA0},     /* Enable HDMI and Analog in */
    {I2C_ADV7441_USER_MAP, 0xF4, 0x2a},        /* Medium High Drive Strength */


    {I2C_ADV7441_USER_MAP, 0x91, 0x10}, /* Setup interlacing */
    {I2C_ADV7441_USER_MAP, 0xA2, 0x0A},     /* start of SAV(MSB) ,SAV = HsyncTime + H BackPorch + Left Border - 4*/
    {I2C_ADV7441_USER_MAP, 0xA3, 0xC6},     /* start of SAV(LSB) and EAV(MSB),EAV = H.total-H.front  */
    {I2C_ADV7441_USER_MAP, 0xA4, 0xF0},     /* start of EAV(LSB) */


    {I2C_ADV7441_USER_MAP, 0xA5, 0x3E},     /* start of VBI(MSB)--ver Sync Time +
                                               v Back Porch + active*/
    {I2C_ADV7441_USER_MAP, 0xA6, 0x70},     /* start of VBI(LSB) and end of VBI(MSB) */
    {I2C_ADV7441_USER_MAP, 0xA7, 0x63},         /* end of VBI(LSB)-ver Sync Time +
                                                   v Back Porch */


    {I2C_ADV7441_USER_MAP, 0x86, 0x0B}, /* not invert the order of Cr & Cb o/p  */




please help me ,thank you

			

			
									
		                             
                        

    

                                            
                 HDMI/DVI Receivers
                
                                                    
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    •  Analog Employees  
    •  Super User  
    
            
						
                            
            
            				
            
                on Jan 13, 2020 5:48 AM
            
            
						
			            		
    
		
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    Hi,
    

     For all non-standard(1600x900) CP PLL modes, the PRIM_MODE and VID_STD must be to set to the nearest available standard to correctly configure the internal parameters of the CP core to decode the specific SD/HD/GR and Interlace/Progressive standard.
            1. Choose the appropriate PRIM_MODE/VID_STD.
            2. Program the latch clock.
            3. Program PLL_DIV_RATIO[11:0].
            4. Program FR_LL[10:0].
    

    The non standard mode details has been provided as a worked example at Nonsupported_Video_Formats_Rev.B.pdf  for other standard mode at page 5.
    

    

    Thanks,
    

    Poornima
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

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                on Jan 14, 2020 1:41 AM
            
            
												
						in reply to PoornimaSubramani
					
										
			            		
    
		
										0
					
	
    

		
		
    
		
    
                                
                                                            
    
					
    thanks for your reply,to input 1600x900 VGA I follow the steps 1 through 6 in the documentation  to config the registers like this:
    

        {0x40, 0x03, 0x0C}, /* Disable TOD */
        {0x40, 0x05, 0x02}, /* Prim_Mode =0110b for HDMI(GR) */
        {0x40, 0x06, 0x07}, /* vid_std = 01100b */
        {0x40, 0x1D, 0x40}, /* Disable TRI_LLC */
        {0x40, 0x3C, 0xA8},     /* SOG Sync level for atenuated sync,*/
    

        {0x40, 0x47, 0x0A}, /* Enable Autotmatic PLL_Qpump and VCO Range*/
    

        {0x40, 0x68, 0xF0}, /* Auto CSC ,YUV Out */
    

        {0x40, 0x6B, 0xD3}, /* Select 422 16 bit YPrPb out from
                                               CP.656 enabled. DE enable*/
        {0x40, 0x7B, 0x0F}, /* TURN ON EAV & SAV CODES */
        {0x40, 0x81, 0xDA}, /* TURN ON AV CODE IN AUTO GR */
    

        {0x40, 0x87, 0xE7}, /* Enable Manual PLL Divider Ratio
                                               0x708 = 1800 */
        {0x40, 0x88, 0x08}, /* Set PLL Divider */
        {0x40, 0x8F, 0x01}, /* Set Free Run Line Length 0x1DD=477 */
        {0x40, 0x90, 0xDD}, /* Set Free Run Line Length */
        {0x40, 0xAB, 0x3E}, /* Set Line Count Max 0x3E8 = 1000 */
        {0x40, 0xAC, 0x80}, /* Set Line Count Max */
        {0x40, 0x91, 0x10}, /* Setup interlacing */
    

    but the image also have problem.If we use HDMI to input 1600x900, use the same method to config the imgae is ok, please help me have a look,thanks.
    

     
    

    

    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
						
						
				
				
		
		
    
			
		
    
	
    

    

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    •  Analog Employees  
    •  Super User  
    
            
						
                            
            
            				
            
                on Jan 14, 2020 8:42 AM
            
            
												
						in reply to hangzhou_01
					
										
			            		
    
		
										0
					
	
    

		
		
    
		
    
                                
                                                            
    
					
    Hi,
    

     Please make sure, the user must provide parameters to enable the ADV7441A to sample correctly for incoming vga video signal. For more details refer section9.15 in ADV7441A HW manual.
    

     These configuration details step will be available for VGA at 0310.ADV7403_Support_Docs.zip
    

    

    Thanks,
    

    Poornima
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

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                on Jan 15, 2020 7:13 AM
            
            
												
						in reply to PoornimaSubramani
					
										
			            		
    
		
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    Hi,
    

    Thanks for your reply ,I have refer the HW manual to config registers like last reply,but not ok.Now I refer the
    

    0310.adv7403_Support_doc you provide to config but stile not good .Only this resolution by VGA in have problem ,and  This resolution has been bothering us for a long time,can you help provide a registers  config list about 1600x900P60 VGA with embeded sync out ,thanks very much. 
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
						
						
				
				
		
		
    
			
		
    
	
    

    

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                on Jan 15, 2020 7:15 AM
            
            
												
						in reply to PoornimaSubramani
					
										
			            		
    
		
										0
					
	
    

		
		
    
		
    
                                
                                                            
    
					
      

    • supplement: HDMI IN 1600X900P60 is ok,and VGA in othor resolution also ok.only VGA IN 1600x900P60 is not OK please help me provide how to config the registers when VGA IN,thanks very much
      • 

    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
						
						
				
				
		
		
    
			
		
    
	
    

    

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    •  Analog Employees  
    •  Super User  
    
            
						
                            
            
            				
            
                on Jan 17, 2020 7:20 AM
            
            
												
						in reply to hangzhou_01
					
										
			            		
    
		
										0
					
	
    

		
		
    
		
    
                                
                                                            
    
					
    Hi,
    

    The input resolution 1600x900 does not have a defined PRIM MODE and VID STD in the ADV7441,hence the problem seen on the analog input.
    

    Try to manually program the ADV7441 with 1600x900 timing details [such as horizontal total lines, vertical total lines etc] via the applicable i2c registers in the ADV7441 or nearest format (1280x960) available in Prime_Mode/Vid_Std.
    

    

    Thanks,
    

    Poornima
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
						
				
				
		
		
    
			
		
    
	
    

    

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