ADV7604BBCZ-5P IIC Question

Hi,

I use A7 FPGA axi-iic ip and microBlaze ip read/write ADV7604BBCZ-5P question:

1) master read ADV7604 iic address: 0x40, reg:0xc, NACK;

2) master write ADV7604 iic address: 0x40,reg:0xc,val:0x42, ACK

But write iic address 0x4C,iic address 0x44,iic address 0x68, NACK

  



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[edited by: lallison at 5:25 PM (GMT 0) on 16 Dec 2019]
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  • 0
    •  Analog Employees 
    on Dec 17, 2019 1:02 PM 10 months ago

    Hi,

     Please make sure with below things are not happened with other maps, this may cause your part to enter NACK state.   

        Stop and start conditions can be detected at any stage during the data transfer. If these conditions are asserted out of sequence with normal read and write operations, these cause an immediate jump to the idle condition.
        During a given SCLK high period, the user should issue only one start condition, one stop condition, or a single stop condition followed by a single start condition.
        If an invalid subaddress is issued by the user, then the part does not issue an acknowledge and returns to the idle condition.

    Thanks,

    Poornima

  • SA Access Problem:

    1. AD7604 has multiple SA's in it, according to Hw, SA: 0x40,0X68,0X44,0X4C and other default device addresses should be accessible. But I can only read and write IO MAP SA: 0x40 normally, all other SA reads and writes NACK, and read IO Map subAddress (reg) : 0xF3-0XFE to get the value of 0.

    2. After power on, read IO Map SA's subAddress (reg) , most of them only read 0, not the default; but after writing configuration data, I can read the configured value, but there are a few cases where I read 0.

  • 0
    •  Analog Employees 
    on Dec 24, 2019 11:58 AM 10 months ago in reply to zzh

    Hi,

    Please make sure below thing,
       Configure the I2C writes for the desired power-up configuration. This should be done before configuring any Analog Front End (AFE) features or applying any ADI recommended initialization setting.
        And also try resetting the I2C master after you do the I2C reset command. After a reset, it's recommended to wait 5ms before you attempt an I2C transaction.         

    Thanks,

    Poornima                

  • Hi

    Based on the above recommendations, I have the following questions:

    1. Is the internal register of the ADV7604 the default or 0 After power up and hard reset? If this is the default, the contents should can get by the iic master, but it is 0 to read every Register of the IO MAP, and NACK occurs for all other MAP ADDRESSES (AFE-0X4C, CP-0X44...) , regardless of whether or not all other MAP ADDRESSES are configured and the functional areas are powered up or not.
    2. "Configure the I2C writes for the desired power-up configuration" does it refer to IO MAP's 0xB, 0xC register write configuration, or other write configuration? Please give an example or document.
    3. Does "I2C reset command" mean to send the "0x00 0x06" sequence on the IIC bus? I tried to send the command, but got a NACK after sending 0x00; also, to prevent hardware reset problems, I sent a hardware reset after powering up and before running the software, which didn't work either, and the result is the same as before. But the IIC master has access to the IIC switch, and other IIC devices on the other channel of switch.
Reply
  • Hi

    Based on the above recommendations, I have the following questions:

    1. Is the internal register of the ADV7604 the default or 0 After power up and hard reset? If this is the default, the contents should can get by the iic master, but it is 0 to read every Register of the IO MAP, and NACK occurs for all other MAP ADDRESSES (AFE-0X4C, CP-0X44...) , regardless of whether or not all other MAP ADDRESSES are configured and the functional areas are powered up or not.
    2. "Configure the I2C writes for the desired power-up configuration" does it refer to IO MAP's 0xB, 0xC register write configuration, or other write configuration? Please give an example or document.
    3. Does "I2C reset command" mean to send the "0x00 0x06" sequence on the IIC bus? I tried to send the command, but got a NACK after sending 0x00; also, to prevent hardware reset problems, I sent a hardware reset after powering up and before running the software, which didn't work either, and the result is the same as before. But the IIC master has access to the IIC switch, and other IIC devices on the other channel of switch.
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