I'm trying to extract VITC data from the ADV7181D and there are some anomalies with the I2C register map.
Looking at the datasheet ADV7181D_Manual_Rev0.pdf from https://ez.analog.com/video/w/documents/760/adv7181d-design-support-files
the register at 0x0E ( ADI Control ) is defined in Table 69. The active bit is bit 5 - SUB_USR_EN.
In the document ADV7181D_ADV7181D@_ADV7341-VER.1.0c.txt also from the same source, which contains initialization scripts the only bit of that register to be controlled is bit 7.
In the first script ##SD CVBS##:AUTODETECT CVBS IN NTSC/PAL/SECAM, 8-Bit 422 encoder, for example :
there are also register accesses in the User 1 space beyond the range of that space.
The limit of the space is 0x9C, but registers from 0xB1 to 0xF6 are accessed.
I could go on but hopefully this will whet your appetite!
Please can you explain these anomalies so I can have confidence that I have the correct documentation?
ADV7181D are arranged into two maps user map and user sub map.But user map enabled by default,the user Map can controls everything..this is why we can able to access till 0xF6.Note: The user sub map has controls for the interrupt and VDP functionality on the ADV7181D and the User Map controls everything.
I am also trying to extract VITC from CVBS with the ADV7181D. In addition to a pcb, I also have the EVALADV7181D board. Is there an EVAL script that extracts VITC and outputs it to the VDP_VITC registers? If not, is there a short list of default register settings? Thus far, I've not been able to get anything other than static random values.
I believe,there is no EVAL script for VITC extraction. VDP_VITC_DATA_0 to VDP_VITC_DATA_8 registers (Registers 0x92 to 0x9A, User Sub Map) are available for the VITC Readback. 1.To access the User Sub Map, the SUB_USR_EN bit in Address 0x0E must be programmed to 1b i.e.Bit 5 is set to 1. 2. Check the value of 0x4E(Bit 6) and 0x78(Bit 6) to know the status of VITC whether it is detected and data is available
Note : VITC has a sync sequence of “10” in between each data byte. The VDP strips these syncs from the data stream to give out only the data bytes.
Thanks Poornima, that was very helpful. We've solved our problem and are now extracting VITC successfully. We have another issue which may be outside the scope of this discussion, but here goes. In NTSC, the VITC is recovered successfully. In PAL, we can recover VITC fully, but only if the input termination is switched off (the AGC is engagged, by the way). If the input is terminated in 75R, the leading hours digit does not decode successfully and the trailing hours digit occasionally flips between 0 and the correct value. Anyv thoughts? I confess this is a new one on me!
The 75 ohm termination resistors should be placed as close as possible to the ADV7181D chip. Any additional trace length between the termination resistors and the input of the ADV7181D increases the magnitude of reflections, which corrupts the graphics signal. 75 ohm matched impedance traces should be used. Trace impedance other than 75 ohms also increase the chance of reflections. Experiments have shown that placing a series ferrite bead prior to the 75 ohm termination resistor is helpful in filtering out excess noise.
The AGC(Automatic gain control) section is followed by a digital clamp circuit, which ensures that the video signal is clamped to the correct blanking level. Automatic adjustments within the CP include gain (contrast) and offset (brightness); manual adjustment controls are also supported.
The target value for the AGC can come from three sources.