MIPI CLK issue of ADV7482

Dear ADI-er

Hello.

Our customer has some problems with ADV7482.

The output of ADV7482 is not recognized by the CPU.

(Input condition is HDMI (1080P)).

The cause is that the MIPI Clock of ADV7482 is not working unlike the MIPI DATA.

Customer set the register as follows.

Could you tell me if there are any incorrect in the customer's register settings?

Please help me.

// =========================== regs setting ==============================

const IsiRegDescription_t ADV7482_reg_set1[] =

{

                 // 8bit I2C addr: 0xE0                IO MAP

                 {0xFF, 0xFF, "0x0100", eReadWrite}, // SW reset

                 // delay 5ms

                 {0x00, 0x5,"0x0100",eDelay},

                 {0x01, 0x76, "0x0100", eReadWrite}, // ADI Required Write

// --- 0x81 800x600P60 modify to 0x5E 1080P60

                 {0x05, 0x5E, "0x0100", eReadWrite}, // Setting Vid_Std to 800x600(SVGA)@60

                 {0xF2, 0x01, "0x0100", eReadWrite}, // Enable I2C Read Auto-Increment

                 {0xF3, 0x4C, "0x0100", eReadWrite}, // DPLL Map Address Set to 0x4C

                 {0xF4, 0x44, "0x0100", eReadWrite}, // CP Map Address Set to 0x44

                 {0xF5, 0x68, "0x0100", eReadWrite}, // HDMI RX Map Address Set to 0x68

                 {0xF6, 0x6C, "0x0100", eReadWrite}, // EDID Map Address Set to 0x6C

                 {0xF7, 0x64, "0x0100", eReadWrite}, // HDMI RX Repeater Map Address Set to 0x64

                 {0xF8, 0x62, "0x0100", eReadWrite}, // HDMI RX Infoframe Map Address Set to 0x62

                 {0xF9, 0xF0, "0x0100", eReadWrite}, // CBUS Map Address Set to 0xF0

                 {0xFA, 0x82, "0x0100", eReadWrite}, // CEC Map Address Set to 0x82

                 {0xFB, 0xF2, "0x0100", eReadWrite}, // SDP Main Map Address Set to 0xF2

                 {0xFC, 0x90, "0x0100", eReadWrite}, // CSI-TXB Map Address Set to 0x90

                 {0xFD, 0x94, "0x0100", eReadWrite}, // CSI-TXA Map Address Set to 0x94

                 {0x00, 0x40, "0x0100", eReadWrite}, // Disable chip powerdown & Enable HDMI Rx block

                 {0x00 ,0x00, "eTableEnd", eTableEnd},

};

 

const IsiRegDescription_t ADV7482_reg_set2[] =

{

                 // 8bit I2C addr: 0x64                 HDMI RX REPEATER MAP

                 {0x40, 0x83, "0x0100", eReadWrite}, // Enable HDCP 1.1

                 {0x00, 0x00, "eTableEnd", eTableEnd},

};

 

const IsiRegDescription_t ADV7482_reg_set3[] =

{

                 // 8bit I2C addr: 0x68                 HDMI RX MAP

                 {0x00, 0x08, "0x0100", eReadWrite}, // Foreground Channel = A

                 {0x98, 0xFF, "0x0100", eReadWrite}, // ADI Required Write

                 {0x99, 0xA3, "0x0100", eReadWrite}, // ADI Required Write

                 {0x9A, 0x00, "0x0100", eReadWrite}, // ADI Required Write

                 {0x9B, 0x0A, "0x0100", eReadWrite}, // ADI Required Write

                 {0x9D, 0x40, "0x0100", eReadWrite}, // ADI Required Write

                 {0xCB, 0x09, "0x0100", eReadWrite}, // ADI Required Write

                 {0x3D, 0x10, "0x0100", eReadWrite}, // ADI Required Write

                 {0x3E, 0x7B, "0x0100", eReadWrite}, // ADI Required Write

                 {0x3F, 0x5E, "0x0100", eReadWrite}, // ADI Required Write

                 {0x4E, 0xFE, "0x0100", eReadWrite}, // ADI Required Write

                 {0x4F, 0x18, "0x0100", eReadWrite}, // ADI Required Write

                 {0x57, 0xA3, "0x0100", eReadWrite}, // ADI Required Write

                 {0x58, 0x04, "0x0100", eReadWrite}, // ADI Required Write

                 {0x85, 0x10, "0x0100", eReadWrite}, // ADI Required Write

                 {0x83, 0x00, "0x0100", eReadWrite}, // Enable All Terminations

                 {0xA3, 0x01, "0x0100", eReadWrite}, // ADI Required Write

                 {0xBE, 0x00, "0x0100", eReadWrite}, // ADI Required Write

                 {0x6C, 0x01, "0x0100", eReadWrite}, // HPA Manual Enable

                 {0xF8, 0x01, "0x0100", eReadWrite}, // HPA Asserted

                 {0x0F, 0x00, "0x0100", eReadWrite}, // Audio Mute Speed Set to Fastest (Smallest Step Size)

                 {0x00 ,0x00, "eTableEnd", eTableEnd},

};

 

const IsiRegDescription_t ADV7482_reg_set4[] =

{

                 // 8bit I2C addr: 0xE0                IO MAP

                 {0x04, 0x00, "0x0100", eReadWrite}, // YCrCb output

                 {0x12, 0xF2, "0x0100", eReadWrite}, // CSC Depends on ip Packets - SDR422 set

                 {0x17, 0x80, "0x0100", eReadWrite}, // Luma & Chroma Values Can Reach 254d

                 {0x03, 0x86, "0x0100", eReadWrite}, // CP-Insert_AV_Code

                 {0x00 ,0x00, "eTableEnd", eTableEnd},

};

 

const IsiRegDescription_t ADV7482_reg_set5[] =

{

                 // 8bit I2C addr: 0x44                 CP MAP

                 {0x7C, 0x00, "0x0100", eReadWrite}, // ADI Required Write

                 {0x00 ,0x00, "eTableEnd", eTableEnd},

};

 

const IsiRegDescription_t ADV7482_reg_set6[] =

{

                 // 8bit I2C addr: 0xE0                IO MAP

                 {0x0C, 0xE0, "0x0100", eReadWrite}, // Enable LLC_DLL & Double LLC Timing

                 {0x0E, 0xDD, "0x0100", eReadWrite}, // LLC/PIX/SPI PINS TRISTATED AUD Outputs Enabled

                 {0x10, 0xA0, "0x0100", eReadWrite}, // Enable 4-lane CSI Tx & Pixel Port

                 {0x00 ,0x00, "eTableEnd", eTableEnd},

};

 

const IsiRegDescription_t ADV7482_reg_set7[] =

{

                 // 8bit I2C addr: 0x44                 CP MAP

                 {0x8B, 0x43, "0x0100", eReadWrite},

                 {0x8C, 0xD4, "0x0100", eReadWrite},

                 {0x8B, 0x4F, "0x0100", eReadWrite},

                 {0x8D, 0xD4, "0x0100", eReadWrite},

                 {0x00 ,0x00, "eTableEnd", eTableEnd},

};

 

const IsiRegDescription_t ADV7482_reg_set8[] =

{

                 // 8bit I2C addr: 0xE0                IO MAP

                 {0x05, 0x54, "0x0100", eReadWrite},

                 {0x03, 0x86, "0x0100", eReadWrite},

                 {0x00 ,0x00, "eTableEnd", eTableEnd},

};

 

const IsiRegDescription_t ADV7482_reg_set9[] =

{

                 // 8bit I2C addr: 0x94                 CSI-TXA MAP

                 {0x00, 0x84, "0x0100", eReadWrite}, // Enable 4-lane MIPI

                 {0x00, 0xA4, "0x0100", eReadWrite}, // Set Auto DPHY Timing

                 {0xDB, 0x10, "0x0100", eReadWrite}, // ADI Required Write

                 {0xD6, 0x07, "0x0100", eReadWrite}, // ADI Required Write

                 {0xC4, 0x0A, "0x0100", eReadWrite}, // ADI Required Write

                 {0x71, 0x33, "0x0100", eReadWrite}, // ADI Required Write

                 {0x72, 0x11, "0x0100", eReadWrite}, // ADI Required Write

                 {0xF0, 0x00, "0x0100", eReadWrite}, // i2c_dphy_pwdn - 1'b0

                 {0x31, 0x82, "0x0100", eReadWrite}, // ADI Required Write

                 {0x1E, 0x40, "0x0100", eReadWrite}, // ADI Required Write

                 {0xDA, 0x01, "0x0100", eReadWrite}, // i2c_mipi_pll_en - 1'b1

                 // delay 2ms

                 {0x00, 0x2,"0x0100",eDelay},

                 {0x00, 0x24, "0x0100", eReadWrite}, // Power-up CSI-TX

                 // delay 1ms

                 {0x00, 0x1,"0x0100",eDelay},

                 {0xC1, 0x2B, "0x0100", eReadWrite}, // ADI Required Write

                 // delay 1ms

                 {0x00, 0x1,"0x0100",eDelay},

                 {0x31, 0x80, "0x0100", eReadWrite}, // ADI Required Write

                 {0x00 ,0x00, "eTableEnd", eTableEnd},

};

 

// =========================== regs read ==============================

/*

IO MAP

reg: 0x0F val: 0x09

reg: 0xDF val: 0x21

reg: 0xE0 val: 0x43

 

HDMI RX MAP

reg: 0x07 val: 0xA7

reg: 0x08 val: 0x80

reg: 0x09 val: 0x04

reg: 0x0A val: 0x38

reg: 0x51 val: 0x4a

reg: 0x52 val: 0x40

*/

Best regards.

SA Jang



Modify some text
[edited by: SA Jang at 8:56 AM (GMT 0) on 12 Nov 2019]
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