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Something pertaining to ADV7510

Hi~ all:

        I am using AD7511 now. But I came up against some problems.

        The following is my configuration for AD7510. Please tell where I did wrong.

        I can't see any picture or color bar on the TV screen.

        Status: No enable HDCP, no enable all the packet functionalities, is able to got the HPD and read EDID.

        and sent 1280_720p_60HZ video format to AD7510 via video capature interface. The video content is 0x4040 (always sent this value)

        it is sent from FPGA.

        Main register                Content

        0x94                            0xE4

        0x95                            0xC0

        0x41                            0x10

        0xA1                            0x7F

        -------------------------------------------

        Read EDID

        ------------------------------------------

        0x98                             0x03

        0x9C                             0x30

        0x9D                             0x61

        0xA2                             0xA4

        0xA3                             0xA4

        0xBB                             0xFF

        0xDE                             0x9C

        0xD0                             0x3C

        0xA4                             0x44

        0x15                             0x01

        0x16                             0x61

        0x48                             0x20

        0x55                             0x0D

        0x17                             0x03

        0x40                             0x80

        0x4C                             0x04

        0x0C                             0x80

        0x44                             0x00

        0xA1                             0x00

        0xAF                             0x06

  • Hello,

    So this was working for ADV7510 and now it is not for ADV7511?

    First step is to see if the ADV7511 is recognizing the video format.  Are you sending the CEA format for 720p/60 with DE/H/V from your FPGA? Have you read register 0x3E in the ADV7511 to see if the VIC code matches the one for the format you are sending?

    Dave

  • Hi~Dave:

                Yes, it is. we sent the video format with DE/H/V. (We follow

    the CEA_861_D standard)

                I read the register 0x3E and get 0x10 (I think the chip

    recognize 720p/60hz video format).

                Besides, I have a question that are we really necessary to

    enable HDCP

                function in the chip, then we are able to pass our video

    patterns to TV?

                BR

    Joseph

    On Wed, Oct 12, 2011 at 3:56 AM, DaveD <analog@sgaur.hosted.jivesoftware.com

  • Hi Joseph,

    Yes that means that the ADV7511 recognizes the format. What voltage are you seeing on the TMDS outputs?

    You do NOT need to enable HDCP unless you want to protect your content.  The TV doesn't care if you encrypt or not.

    Dave

  • Hi~ Dave:

                Sorry, my typo~ my chip is ADV7510.

                The voltages for TMDS 4 pairs are around 3.3V. And I can not see

    the clock channel

                drives the clock. When can I see the clock drive out ? (After

    setting a certain register?)

                I check the register 0xA1 -- > 0x00, it shows that all the TMDS

    channel are power up, right?

                And  0x42 ---> 0x60, shows Rx sense detected.

                Still don't understand why it doesn't show the clock and data.

    Joseph

    On Thu, Oct 13, 2011 at 5:39 AM, DaveD <analog@sgaur.hosted.jivesoftware.com

  • Hello Joseph,

    One of those pairs is the clock, the other 3 are data.  If you are seeing that voltage on the pairs-- it is sending video.  What display are you connected to?  Have you tried other displays?

    From what you are telling me, ADV7510 is working properly.

    Dave

  • Hi~Dave:

            I know the TMDS has 4 differential pairs, and one of them is clock.

            However, I still can't see any clock drive out.

            The display I used can displays 1080i (Sony, BRAVIA), it can show

    video well with DVD player.

            I find the register 0x44 --> 0x79. Showing N_CTS, Audio smaple, AVI

    InfoFrame, Audio

            InfoFrame enable. Should I have to fill out Audio InfoFrame? I

    filled out the AVI InfoFrame,

            but still no picture pattern on my display.

            Actually, I followed the instruction of quick start in the "AD7510

    programming guide".

            to fill the value into individual registers it says. However,

    doesn't work. Do you have

            a clear initial procedure document or reference code? So that I can

    come out soon.

            BR

    Joseph

    On Thu, Oct 13, 2011 at 10:29 PM, DaveD <

  • Hi Joseph,

    Clock drive out of what?  Are you talking about clock on something other than the TMDS pairs?  If you are seeing voltage on all the TMDS pairs, there is a clock.  What does the TV say?  Sync out of range or no input?

    The TV working with a DVD doesn't really say anything-- you aren't sending the same thing as a DVD player which would be encrypted and probably 4:2:2 YCbCr in HDMI mode.

    There is a .zip on the ADV7612 page (http://ez.analog.com/docs/DOC-1751) with scripts in a text file-- it'll be in the ADV7612 section but it has scripts for 7511-- which should be fine for your case.  The writes to i2c address 0x72 are the ones to look for.

    The first section, second script is probably closest to what you are doing.  The section that matters to you is:

    72 01 00 ; Set N Value(6144)
    72 02 18 ; Set N Value(6144)
    72 03 00 ; Set N Value(6144)
    72 15 00 ; Input 444 (RGB or YCrCb) with Separate Syncs, 44.1kHz fs
    72 16 60 ; Output format 444, 36-bit input
    72 18 46 ; CSC disabled
    72 40 80 ; General Control packet enable
    72 41 10 ; Power down control
    72 48 08 ; Data right justified
    72 49 00 ; No truncation
    72 4C 06 ; 12 bit Output
    72 55 40 ; Set YCrCb 444 in AVinfo Frame
    72 56 08 ; Set active format Aspect
    72 96 20 ; HPD Interrupt clear
    72 98 03 ; ADI Recommended Write
    72 99 02 ; ADI Recommended Write
    72 9C 30 ; PLL Filter R1 Value
    72 9D 61 ; Set clock divide
    72 A2 A4 ; ADI Recommended Write
    72 A3 A4 ; ADI Recommended Write
    72 A5 04 ; ADI Recommended Write
    72 AB 40 ; ADI Recommended Write
    72 AF 16 ; Set HDMI Mode
    72 BA 60 ; No clock delay
    72 D1 FF ; ADI Recommended Write
    72 DE D8 ; ADI Recommended Write
    72 E4 60 ; VCO_Swing_Reference_Voltage
    72 FA 7D ; Nbr of times to search for good phase

    This might not be exactly what you are looking for but it's probably a better start than what you have.

    Dave

  • Hi ~ Dave:

            Thanks for your information. And I will try it next week. and see

    what it goes.

            Besides, what I mean on TMDS clock is that I can not see the clock

    on the TMDS clock

            pair, sorry to confuse you.

            BR

    Joseph

    On Sat, Oct 15, 2011 at 3:47 AM, DaveD <analog@sgaur.hosted.jivesoftware.com

  • Hi Joseph,

    Ok.. good luck!  The TMDS clock encoded on the differential pairs doesn't really look like a clock signal if you probe it with a normal single-ended scope probe.

    Dave

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