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ADV7343 Video issue


I have my custom made ADV7343 board where iam giving 27MHZ clock input now i want the test pattern to be generated. This is our secon revision in first revision we had some problem but got resolved ( ) now in this board when i give 27MHZ input i2C lines is alsi in 27 MHZ as shown below

My input clock is shown below

Even in the output i think this clock is influencing 

I checked my input clock it clean and proper, voltages and pull ups are proper i also doubt whether the 27mhz show in the i2c lines is not allowing proper configuration of I2C, i checked for short between 12C , supply and input clock there is no short. i also attach schematic down for ur reference.

Kindly suggest any solution for this problem.


  • Hi,

    The I2C registers can be accessed read/write without the input clock because it uses the I2C SCLK.

    The internal clock comes directly from the external clock, 27MHz.

    After power-up, Wait 5mS to access I2C,because internal clock should be stable,then the device will work fine.



  • 1) Looking at the schematic, the power rails need to be isolated from each other via a PI type filter as shown in the datasheet application schematic with the ferrite beads.  I've also found that a Murrata power line filter like a NFM21PC105B1C3B works quite well.  PVDD needs to be kept very clean.  I'd scope out the power rails to see if the 27MHz noise it there also, especially VAA and PVDD

    2) Looking at the 27MHz waveforms, there appears to be an impedance mis-match in the clock trace causing the undershoot you see in the waveform.  Try changing the output drive strength from the FPGA or put a 33 Ohm series resistor in the clock trace near the source.  This assumes a 50 Ohm trace design.  (DAC outputs would need to be 75 Ohm if connecting directly to 75 Ohm cable or sink, high power mode)

    3) Layout is important here, the best is to have a solid ground plane on layer 2 under the part and make sure the power rails are well filtered.  The clock trace should avoid running near the DAC outputs where the clock switching edges might couple into the outputs also.

    4) The clock should not be on the video signals.  Having it there can cause all types of problems with the sink.  The sink might not be able to properly lock on the the color burst frequency causing color display problems.

    5) I'm not sure how the 27MHz clock could effect I2C transactions.  I2C is not dependent on the video clock and anyway and the noise is not sufficient to cause problems on the I2C bus.

    Some notes:

    1) A 200MHz scope is barely sufficient to capture and display a 27MHz clock wave form properly.  Remember from Fourier transforms class a square wave is made up of the sum of the primary plus odd harmonics.  In this case you'll only capture the 3rd, 5th and 7th harmonic.  The first 3 harmonics gives a good representation of the waveform but it is not 100% accurate. 

    2) I am not sure if the 27MHz is derived from the FPGA or a crystal.  FPGA PLLs jitter/accuracy performance, in general, do not meet video clocking requirements.  The issue is more prevalent for HD clocks.  I don't see any issues here.  I'm just mentioning it for you to keep in mind.  

  • Hi Poornima ,

    I2C is fine when no external clock has been given, I can also able to write without external clock, but the moment when I connect 27mhz to the pin it's affecting every where, I can see the 27mhz at the scl and SDA pin. This is bit weird!

  • GA PLLs jitter/accuracy perform


    I can see the input power supply is clean, i checked all my power before applying clock and its clean, the moment when i apply clock to the pin , i can see the 27Mhz in the i2c lines, power lines and dac output, one reason might be that if any influence of 27Mhz at any i2c Line or any other pull up required line the 27Mhx have chances to pass through the power supply via the pull up resistors.

    Ill run through the design once mean while if have any suggestion let me know.


  • for your reference:

     When no power supply is given and only the clock input 27 MHz is given in the output of dac i have 27Mhz (but lower voltage level) as shown in the below image

    and following on the i2c line when no power is given and only clock 27Mhz is given