7612 manually generated interrupt

Hi Robert,

Your write to IO Map 0x40 appears to be touching a reserved bit (bit 5.)  I'm looking into the rest.

-Matt

Hi Robert,

I see that when I change MPU_STIM_INTRQ from 0 to 1, it causes MPU_STIM_INTRQ_RAW to be set to 1.  The interrupt (MPU_STIM_INTRQ_ST) will also be set to 1 if MPU_STIM_INTRQ_MB1 or MPU_STIM_INTRQ_MB2 are set to 1.

If I then change MPU_STIM_INTRQ back to 0, MPU_STIM_INTRQ_RAW and MPU_STIM_INTRQ_ST will remain set to 1. In order to get these bits to return to 0, it is necessary to clear the interrupt by setting MPU_STIM_INTRQ_CLR. You seem to be doing this correctly.

Once MPU_STIM_INTRQ_RAW and MPU_STIM_INTRQ_ST are back to 0, I can then trigger the interrupt again by changing MPU_STIM_INTRQ from 0 to 1.

Give this a try and let me know if you're seeing something different.

-Matt

Hi

Thank you for the prompt replay.

Could you please you share me your full sequence and exact byte values you are writing?

We try both with our driver and i2c buspirate write on the evaluation board. The result is the same: we cannot fire the interrupt again.

Thanks,

Robert

Hi Robert,

Here's the sequence I'm using:

Write 98 4B 80 (was 00)

Write 98 40 E5 (change MPU_STIM_INTRQ from 0 to 1)

Read 98 47 (bit 7 is now 1)

Read 98 48 (bit 7 is now 1 )

Write 98 40 E1 (change MPU_STIM_INTRQ from 1 to 0)

Write 98 49 80 (clear interrupt)

Read 98 47 (bit 7 is now 0)

Read 98 48 (bit 7 is now 0)

---

Write 98 40 E5 (change MPU_STIM_INTRQ from 0 to 1)

Read 98 47 (bit 7 is now 1)

Read 98 48 (bit 7 is now 1 )

Write 98 40 E1 (change MPU_STIM_INTRQ from 1 to 0)

Write 98 49 80 (clear interrupt)

Read 98 47 (bit 7 is now 0)

Read 98 48 (bit 7 is now 0)

---

you should be able to repeat this process over and over ...

-Matt

Thanks Matt, This works. From your script, I found what I missed is the "write 98 40 e1".

BTW, There is a minor typo

I think Write 98 40 80 (clear interrupt) should be

Write 98 49 80

Good catch!!! I corrected the text above.

-Matt

I have followed same steps and  below is my observation.

i2cset -f -y 1 0x4C 0x4B 0x80
i2cset -f -y 1 0x4C 0x40 0xE5
INTERRUPT TRIGGERED
i2cget -f -y 1 0x4C 0x47
i2cget -f -y 1 0x4C 0x48

i2cset -f -y 1 0x4C 0x40 0xE1
i2cset -f -y 1 0x4C 0x49 0x80
INTERRUPT TRIGGERED
i2cget -f -y 1 0x4C 0x47
i2cget -f -y 1 0x4C 0x48

----------------------------

i2cset -f -y 1 0x4C 0x4B 0x80
i2cset -f -y 1 0x4C 0x40 0xE5

i2cget -f -y 1 0x4C 0x47
i2cget -f -y 1 0x4C 0x48

i2cset -f -y 1 0x4C 0x40 0xE1
i2cset -f -y 1 0x4C 0x49 0x80
INTERRUPT TRIGGERED
i2cget -f -y 1 0x4C 0x47
i2cget -f -y 1 0x4C 0x48

Why interrupt get triggered when I clear the interrupt.(Write 98 49 80 (clear interrupt))?