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(ADV7611)Why ADV7611 output SCLK befor HDMI input?

Hi !

Various register settings are made after the ADV7611 power is turned on, regardless of the TMDS input.

At that time, “TRI_AUDIO, IO, Address 0x15 [4]”: 1 → 0 was also set, and 9.8437MHz SCLK was output even HDMI is not input.

This frequency is considered to be determined by the ADV7611 device, but as the description can not be found on the specifications including "UG-180.pdf".

Q1)
Why ADV7611 output this frequency?

Q2)

Is the frequency always constant at 9.8437 MHz?

Best regards

Kawa

Parents Reply
  • Hi !

    We will wait your update.

    Our point is when user set up ADV7611 even if their is no HDMI input, what is the value for SCLK frequency.

    We want know because our customer want to reduce EMI.

    So it will be useful if you can tell how to limit ADV7611 SCLK frequency but still we want to know the initial SCLK frequrncy.

    Also I understood that SCLK is 64 times the LR.

    Then we want to know LR sample clock initial frequency.

    Anyway we will wait your advice


    Best regards

    Kawa

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  • FormerMember
    0 FormerMember
in reply to donadona999s

Hi

I do not know where the 9MHz clock rate originates from, my guess would be the audio PLL is free running and maxing out.  I'd have to research this some to figure out the exact root cause

As part of your initialization you can tri-state the audio pins until HDMI is connected and see stable audio from the source.

TRI_AUDIO 0x15[4] = 1

  • Hi !

    Thank you for your reply.

    We will wait for your reply.

    We already know that we can disable by using TRI_AUDIO.

    Let us know if you can give us the initial frequency.

    Q1)
    Why ADV7611 output this frequency?

    Q2)

    Is the frequency always constant at 9.8437 MHz?

    Best regards

    Kawa

  • Hi !

    How is it going?

    Our customer want your answer ASAP.

    Best regards

    Kawa

  • Hi,

    We have verified in our evaluation board, here also we could see the same phenomena i.e frequency always constant at 9.8437 MHz.

    But don't know where it originate from,As Guenter mentioned "this might be the audio Pll is free running and maxing out".

    This query has already forwarded to part specialist.

    Thanks,

    Poornima

  • Hi !

    Thank you for your help.

    I understood.

    I will wait your additional advice.


    Best regards

    Kawa

  • Hi 

    How is your progress thereafter?


    Best regards
    Kawa

  • Hi,

    The recommendation from the expert in this case will be "to tristate the audio pin until audio is present and have not qualified the behaviour for when the audio source is not present but the pins are not tristated as the recommendation is to tristate until there is audio"

    Thanks,

    Poornima

  • Hi 

    Thank you for your reply.

    I understood.

    Best regards

    Kawa