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ADV7842 I2S output with compressed audio input

This is an open letter to the ADV7842 design team.

I was not able to get any output on AP1 in the I2S format with a compressed audio signal (Dolby Digital) coming in over HDMI. Every status indicator showed that it should be working and that audio was unmuted. I tried playing with I2SOUTMODE and finally found some activity on the pin when I set it to RAW SPDIF. But the SPDIF signal didn't look right so I set it back to I2S mode and just for the heck of it I tried setting bit 7 of the register (HDMI Map 0x03). Lo and behold I got the correct I2S output!

Bit 7 in this register is not documented in the HW reference manual or the register map. This register is not written to in any of the HDMI scripts. Needless to say I am really pissed off about the lack of documentation, having wasted several days trying to get it to work. This is such a basic operation for this part, most cable channels use Dolby Digital for their audio, that I can't believe this wouldn't have been tested and documented properly.

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  • Hello,

    Too late I know but for what it's worth... I got the documentation for that bit and a related one and they'll be in the next revision of the docs:

    NEW_MUTE_COMPRS (HDMI, 0x1A [7])

    Configures the audio mute function

    • 0 = The part mutes the audio data it outputs in I2S format if it receives compressed audio and the mute mask MT_MSK_COMPRS_AUD is set high. The mute circuit mutes the audio data by ramping down the outgoing audio data.

    • 1 [Default] = See the description of DIS_I2S_ZERO_COMPR.

    DIS_I2S_ZERO_COMPR (HDMI 0x3 [7])

    Enable/Disable zero’ing of I2S data. This control is effective when NEW_MUTE_COMPRS is set high.

    • 0[Default]  = The reception of compressed audio does not cause the part to mute the I2S output (i.e. MT_MSK_COMPRS_AUD has no effect) but rather to zero audio data output via the I2S outputs. If any other mute condition causes a mute while compressed audio is received (e.g. loss of TMDS clock) all output are not ramped down but rather zero’ed sharply.

    • 1 = The reception of compressed audio does not cause the part to mute the I2S output (i.e. MT_MSK_COMPRS_AUD has no effect) nor to zero audio data output via the I2S outputs. If any other mute condition causes a mute while compressed audio is received (e.g. loss of TMDS clock) all output are not ramped down but rather zero’ed sharply

    Dave

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  • Hello,

    Too late I know but for what it's worth... I got the documentation for that bit and a related one and they'll be in the next revision of the docs:

    NEW_MUTE_COMPRS (HDMI, 0x1A [7])

    Configures the audio mute function

    • 0 = The part mutes the audio data it outputs in I2S format if it receives compressed audio and the mute mask MT_MSK_COMPRS_AUD is set high. The mute circuit mutes the audio data by ramping down the outgoing audio data.

    • 1 [Default] = See the description of DIS_I2S_ZERO_COMPR.

    DIS_I2S_ZERO_COMPR (HDMI 0x3 [7])

    Enable/Disable zero’ing of I2S data. This control is effective when NEW_MUTE_COMPRS is set high.

    • 0[Default]  = The reception of compressed audio does not cause the part to mute the I2S output (i.e. MT_MSK_COMPRS_AUD has no effect) but rather to zero audio data output via the I2S outputs. If any other mute condition causes a mute while compressed audio is received (e.g. loss of TMDS clock) all output are not ramped down but rather zero’ed sharply.

    • 1 = The reception of compressed audio does not cause the part to mute the I2S output (i.e. MT_MSK_COMPRS_AUD has no effect) nor to zero audio data output via the I2S outputs. If any other mute condition causes a mute while compressed audio is received (e.g. loss of TMDS clock) all output are not ramped down but rather zero’ed sharply

    Dave

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