About the ADV7619 register configuration problem?

I configured the registers according to ADV7619-VER.1.9c.txt. The registers are configured as follows:
/////////////////////////IO寄存器配置device_address[0] = 8'h98;
device_address[0] = 8'h98;////98
device_address[1] = 8'h68;
device_address[2] = 8'h44;
device_address[3] = 8'h64;
device_address[4] = 8'h4c;
//////////////////////////IO寄存器配置device_address[0] = 8'h98;
sub_address[0] = 8'hff;////////I2C reset
data_table[0] = 8'h80;
sub_address[1] = 8'hf4;///////CEC
data_table[1] = 8'h80;///////////
sub_address[2] = 8'hf5;//////////INFOFRAME
data_table[2] = 8'h7c;
sub_address[3] = 8'hf8;/////////DPLL
data_table[3] = 8'h4c;/////////
sub_address[4] = 8'hf9;////////KSV
data_table[4] = 8'h64;
sub_address[5] = 8'hfa;//////////EDID
data_table[5] = 8'h6c;
sub_address[6] = 8'hfb;//////////HDMI
data_table[6] = 8'h68;
sub_address[7] = 8'hfd;//////////CP
data_table[7] = 8'h44;
///////////////////////////////
sub_address[8] = 8'hc0;///////0x68////////device_address[1] = 8'h68;////ADI Required Write
data_table[8] = 8'h03;
////////////////////////////////////////////
sub_address[9] = 8'h01;///////0x98//////////device_address[0] = 8'h98;///Prim_Mode =110b HDMI-GR
data_table[9] = 8'h06;//16-50hz///06-60hz
sub_address[10] = 8'h02;//////////////////////////////////////////Auto CSC, RGB out, Set op_656 bit
data_table[10] = 8'hf7;/////RGB???
sub_address[11] = 8'h03;////////////////////////////////////////////24 bit SDR 444 Mode 0
data_table[11] = 8'h40;
sub_address[12] = 8'h04;/////////////////参考晶振24Mhz及RGB与引脚关系
data_table[12] = 8'h66;
sub_address[13] = 8'h05;////////////////////////////////////AV Codes Off
data_table[13] = 8'h28;
sub_address[14] = 8'h06;
data_table[14] = 8'ha6;
sub_address[15] = 8'h0c;
data_table[15] = 8'h42;
sub_address[16] = 8'h15;
data_table[16] = 8'h80;
sub_address[17] = 8'h19;
data_table[17] = 8'h83;
sub_address[18] = 8'h33;
data_table[18] = 8'h40;///////////98 33 40///////
/////////////////////////////
sub_address[19] = 8'hba;//////0x44////////device_address[2] = 8'h44;
data_table[19] = 8'h01;
sub_address[20] = 8'h6c;
data_table[20] = 8'h00;
/////////////////////////////////
sub_address[21] = 8'h40;///////0x64/////device_address[3] = 8'h64;
data_table[21] = 8'h81;
///////////////////////////////////////
sub_address[22] = 8'hb5;//////////0x4c/////device_address[4] = 8'h4c;
data_table[22] = 8'h01;
//////////////////////////////////
sub_address[23] = 8'hc0;////////////0x68////device_address[1] = 8'h68;
data_table[23] = 8'h03;
sub_address[24] = 8'h00;
data_table[24] = 8'h00;/////Set HDMI Input Port A (BG_MEAS_PORT_SEL = 001b)
sub_address[25] = 8'h02;
data_table[25] = 8'h03;
sub_address[26] = 8'h03;
data_table[26] = 8'h98;
sub_address[27] = 8'h10;
data_table[27] = 8'ha5;
sub_address[28] = 8'h1b;///////////////
data_table[28] = 8'h08;
sub_address[29] = 8'h45;
data_table[29] = 8'h04;
sub_address[30] = 8'h97;
data_table[30] = 8'hc0;
sub_address[31] = 8'h3d;
data_table[31] = 8'h10;
sub_address[32] = 8'h3e;
data_table[32] = 8'h69;
sub_address[33] = 8'h3f;
data_table[33] = 8'h46;
sub_address[34] = 8'h4e;
data_table[34] = 8'hfe;
sub_address[35] = 8'h4f;
data_table[35] = 8'h08;
sub_address[36] = 8'h50;
data_table[36] = 8'h00;
sub_address[37] = 8'h57;
data_table[37] = 8'ha3;
sub_address[38] = 8'h58;
data_table[38] = 8'h07;
sub_address[39] = 8'h6f;////////////
data_table[39] = 8'h08;
sub_address[40] = 8'h83;
data_table[40] = 8'hfc;
sub_address[41] = 8'h84;
data_table[41] = 8'h03;
sub_address[42] = 8'h85;
data_table[42] = 8'h10;
sub_address[43] = 8'h86;
data_table[43] = 8'h9b;
sub_address[44] = 8'h89;
data_table[44] = 8'h03;
sub_address[45] = 8'h9b;
data_table[45] = 8'h03;
sub_address[46] = 8'h93;
data_table[46] = 8'h03;
sub_address[47] = 8'h5a;//////
data_table[47] = 8'h80;
sub_address[48] = 8'h9c;
data_table[48] = 8'h80;
sub_address[49] = 8'h9c;
data_table[49] = 8'hc0;
sub_address[50] = 8'h9c;
data_table[50] = 8'h00;
EDID is stored in external EPROM,when I plug in port A, the computer can recognize the EDID.
I found that the register configuration was successful, but port A has no image input.If I don't plug in the cable into port A, the free run mode can work. 
I use FPGA for IIC configuration,and the SCL is 10khz. 

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