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AD8113 Reset

Thread Summary

The user is experiencing excess current flow in a 128 x 128 matrix using 64 AD8113 switches after asserting RESET and UPDATE from low to high. The solution involves ensuring the shift register is fully programmed before updating the second-rank latch, and the minimum wait time between UPDATE and RESET going high is 50 ns. The issue is likely due to random data in the shift register on power-up, causing some outputs to be enabled.
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Hi ,

We are using 64 AD8113 which is used to makes up a 128 x 128 Matrix .

After powering up with Input ±5V , then RESET after 1 sec (L -> H) on certain condition there is excess current flow .

Could you please let me know what are the possible condition that can be thought for this issue  .

Thanking you

With best regards and wishes