AD9889B hdmi Interlaced output question

The HDMI analyzer shows that the format of ad9889b hdmi output is progressive in 1080i50/59.94/60 and 576i/480i.

it shows that the vtotal of 1080i50/60 is 562, the vtotal of 576i50 is 313, the vtotal of 480i60 is 262,  

Hdmi output timing is reference cea 861. 

Parents
  • 0
    •  Analog Employees 
    on Apr 10, 2019 7:01 AM

    Hi,

     AD9889B is HDMI/DVI transmitter, So it can supports all resolutions from 480i(interlaced) to 1080p(progressive) and UXGA at 60 Hz.

     At receiver side have you enabling the i2p feature?

     

    Thanks,

    Poornima

  • Hi,Poornima

      thanks for your reply.

      1. It is normal for the hdmi interlaced output to be directly connected to the variety of monitors;but the hdmi  analytical instrument considers it to be a progressive signal.

      2. The hdmi output is directly connected to the analytical instrument

  • 1. The picture above is the test environment we built.;

    2. What do you mean by direct connection?

    3. I want to confirm that the chip has other related registers that need to be configured when the HDMI output is interlaced???

  • 0
    •  Analog Employees 
    on Apr 16, 2019 8:46 AM in reply to edison

    Hi,

     1. What do you mean by direct connection?

         It mean directly source(Generator) connected to sink(Monitor/Tv) without ad9889b chipset.If you observe the same with direct connection,then it might be a equipment(780C) problem or some notation.

     2. I want to confirm that the chip has other related registers that need to be configured when the HDMI output is interlaced???

           No need to configure any register, because in other sink(Tv/Monitor), it is observed as interlaced output right

    Thanks,

    Poornima

  • hi,

        The whole thing is that i can see correct timing result in 780C for interlaced/progressive formats at the beginning.

        But the VID value of the 1080P25 and 1080P30 was wrong in 780C, they are 31 and 16. the correct values should be 33 and 34.
        So I configured the VID in user mode according to the chip manual(To override the VID detection, the pixel repeat mode must be set to manual by setting register 0x3B[6:5] = ‘0b11’. The desired VID is
    input into 0x3C[5:0].). This change solves the problem of VID, But there is a new problem with 780C recognizing that interlaced output is incorrect.

       1. Are the VID values you see in QD780D for 1080P25 and 1080P30 correct when 9889 is configured as default?

       2. Why is the interlaced output of the instrumental analysis AD9889B incorrect when the VID is set to user mode?

  • 0
    •  Analog Employees 
    on Apr 23, 2019 10:35 AM in reply to edison

    Hi,

     1. Are the VID values you see in QD780D for 1080P25 and 1080P30 correct when 9889 is configured as default?

        Here we have verified with other transmitter using QD780D,but we could get correct VID values in QD780D.

        And also AD9889b is not recommended for new designs.It is begin replaced by the ADV7511.

        Note also we have various low cost (~$200) reference boards that implement the ADV7511.  Check out
            ez.analog.com/.../DOC-1713
            ez.analog.com/.../DOC-1944
            http://ez.analog.com/docs/DOC-1681

    2. Why is the interlaced output of the instrumental analysis AD9889B incorrect when the VID is set to user mode?

        a) After setting the VID value for 1080p25 and 1080p30, are you recognizing the interlaced output is incorrect? Am i right ?

        b) But before configuring the VID in user mode,you could get correct interlaced output? My understanding is correct ?

    And also please let us know the below case too.

        c) In direct connection,are you getting correct interlaced output right?

           

        d) Or by using AD9889B chipset,are you facing the issue with analytical instrument?

                   

    Thanks,

    Poornima   

  • hi,

        Poornima,thanks for your reply.

        a) After setting the VID value for 1080p25 and 1080p30, are you recognizing the interlaced output is incorrect? Am i right ?

        To be precise, I set the VID to manual mode for all resolution output, only the interlaced output has problems.

        b) But before configuring the VID in user mode,you could get correct interlaced output? My understanding is correct ?

        yes, you are right.

        d) Or by using AD9889B chipset,are you facing the issue with analytical instrument?

        yes.

Reply
  • hi,

        Poornima,thanks for your reply.

        a) After setting the VID value for 1080p25 and 1080p30, are you recognizing the interlaced output is incorrect? Am i right ?

        To be precise, I set the VID to manual mode for all resolution output, only the interlaced output has problems.

        b) But before configuring the VID in user mode,you could get correct interlaced output? My understanding is correct ?

        yes, you are right.

        d) Or by using AD9889B chipset,are you facing the issue with analytical instrument?

        yes.

Children
  • 0
    •  Analog Employees 
    on Apr 24, 2019 2:26 PM in reply to edison

    Hi,

     Please let us know your VID manual setting.whether we miss anything.

    Thanks,

    Poornima

  • Hi,

      Below is the code for the VID setting.

    //-----------------------------------------------------------------------------------------
    void AD9889DisablePixelRp(u8 Format)
    {
    u8 Addr = 0x3b;
    u8 PixelRp=0;

    PixelRp = Ad9889Read(Addr);

    if(Format > 2)
    {//bit[6:5] -> 2'b11; bit[4:3]/bit[2:1] -> 2'b00
    PixelRp = (PixelRp&0xf5) | 0x60;
    }
    else
    {//bit[6:5] -> 2'b11; bit[4:3]/bit[2:1] -> 2'b01 //Set Pixel Repetition to x2 when 480i and 576i output,
    PixelRp = PixelRp | 0x6a;
    }
    AD9889WriteByte(Addr, PixelRp);
    }
    //-----------------------------------------------------------------------------------------
    //Format
    //0-625i50
    //1-525i60
    //2-625i50

    //3-720p24
    //4-720p25
    //5-720p30
    //6-720p50
    //7-720p60

    //8 -1080i50
    //9 -1080i60

    //10-1080p24
    //11-1080p25
    //12-1080p30
    //13-1080p50
    //14-1080p60
    //ff-1080i50

    u8 table_vid[]={21,6,21, 60, 61, 62, 19, 4, 20, 5, 32, 33, 34, 31, 16};

    void AD9889SetVID(u8 Format)
    {
    u8 Addr = 0x3c;
    u8 Vid;
    u8 Temp=0;

    Format = Format & 0x0f;

    Vid = table_vid[Format]; //Format is above

    AD9889DisablePixelRp(Format);
    DelayXms();
    DelayXms();

    Temp = Ad9889Read(Addr);
    Vid = (Temp&0xc0) | Vid;
    //0x3c bit[5:0]
    AD9889WriteByte(Addr, Vid);
    }

  • Hi,Poornima

        Any progress on my questions ? 

  • +1
    •  Analog Employees 
    on May 8, 2019 12:11 PM in reply to edison

    Hi,

      It doesn't seems any mistake in configuration.And also if mistake in configuration, you could get incorrect output in monitor also.

      Have you verified the same with some other analytical instrument?

      By direct connection , you can able to see the correct VIC ? Please crosscheck it in your side.

      Please also note as i said earlier, AD9889b is not recommended for new designs.It is being replaced by the ADV7511.

      Please let take a look for AD9889 change over guide(AD9889B to ADV7513 Changeover Guide) at ez.analog.com/.../adv7513-design-support-files

    Thanks,

    Poornima