It seems this CCD processor will not tri-state it's data bus under any circumstances, I have tried setting the tri-state bit in the control register and selecting "total power down" in the operation register yet the bus remains driven. The data sheet (Rev B) even shows a schematic of the output driver including it's tri-state control (page 7), is this yet another case where the data sheet is completely wrong or am i missing something ?
PS attached is scope shot of serial write loading control register with tri-state bit set.
