ADV7610 registers 4:2:2

Hello

Thanks in advance.

I have a input video signal whose format is: YCbCr (Digital YUV) 20 bit (10 chroma + 10 luma).. 1080p60 (1920x1080 60 fps).

As I can read in this forum ADV7610 only supports four modes for SDR 4:2:2:

                 - 8 bit SDR ITU-R BT.656 Mode 0

                 - 12 bit SDR ITU-R BT.656 Mode 2

                 - 16 bit SDR ITU-R BT.656 4:2:2 Mode 0

                 - 24 bit SDR ITU-R BT.656 4:2:2 Mode 0

I have the below registers map, but I ADV7610 do not have activitie in its outpus. 

(x"98" , x"FF" , x"80"),      -- IO Map: I2C reset. Apply Main I2C reset.
--(x"98" , x"FF" , x"00"),      -- IO Map: I2C reset. Normal operation (no reset).
-- (x"98" , x"F4" , x"80"),      -- IO Map: CEC_SLAVE_ADDR: Programmable I2C slave address for CEC map
-- (x"98" , x"F5" , x"7C"),      -- IO Map: INFOFRAME_SLAVE_ADDR: Programmable I2C slave address for Infoframe
(x"98" , x"F8" , x"4c"),      -- IO Map: DPLL_SLAVE_ADDR: Programmable I2C slave address for DPLL map
(x"98" , x"F9" , x"64"),      -- IO Map: KSV_SLAVE_ADDR: Programmable I2C slave address for KSV map, repeater map
(x"98" , x"FA" , x"6C"),      -- IO Map: EDID_SLAVE_ADDR: Programmable I2C slave address for EDID map
(x"98" , x"FB" , x"68"),      -- IO Map: HDMI_SLAVE_ADDR: Programmable I2C slave address for HDMI map
(x"98" , x"FD" , x"44"),      -- IO Map: CP_SLAVE_ADDR: Programmable I2C slave address for CP map
-- (x"40" , x"f7" , x"66"),      -- ADV7604 (not used in adb7610)
-- (x"40" , x"fc" , x"52"),      -- ADV7604 (not used in adb7610)
-- (x"4c" , x"15" , x"06"),      -- ADV7604  AFE Map (not used in adb7610)
(x"44" , x"69" , x"14"),      -- CP Map: MAN_CP_CSC_EN: Manual override to force CP-CSC to be enabled
(x"44" , x"ba" , x"01"),      -- CP Map: HDMI_FRUN_MODE and HDMI_FRUN_EN: The part free runs when the TMDS clock is not detected on the selected HDMI port and Enable the free run feature in HDMI mode
-- (x"44" , x"c7" , x"01"),      -- ADV7604 (not used in adv7610)
-- (x"44" , x"c6" , x"2c"),      -- ADV7604 (not used in adv7610)
(x"98" , x"33" , x"40"),      -- IO Map: LLC_DLL_MUX: Muxes the DLL output on LLC output
(x"98" , x"19" , x"93"),      -- IO Map: Enable LLC DLL.  phase 20
(x"4c" , x"b5" , x"01"),      -- DPLL Map:  Selects the multiple of 128fs used for MCLK out: 256fs
(x"68" , x"56" , x"d8"),      -- HDMI Map: disable the digital glitch filter on the HDMI 5V detect signals. timer for the digital glitch filter on the HDMI +5 V detect inputs: Approximately 4.2us
(x"98" , x"0b" , x"44"),      -- IO Map: Powers up CP and digital sections of HDMI block. Powers up XTAL buffer to the digital core.
(x"98" , x"0c" , x"42"),      -- IO Map: Disables power save mode, Powers up the clock to the CP core, Powers up the pads of the digital output pins

(x"68" , x"3d" , x"10"),    -- ??CEC map, ADI recommended write                   
(x"68" , x"3e" , x"39"),    -- CEC map, ADI recommended write                   
(x"68" , x"4e" , x"3b"),    -- CEC map, ADI recommended write                   
(x"68" , x"57" , x"b6"),    -- CEC map, ADI recommended write                   
(x"68" , x"58" , x"03"),    -- CEC map, ADI recommended write                   
(x"68" , x"9d" , x"01"),    -- CEC map  ??
                                        
(x"68" , x"8d" , x"18"),    -- HDMI Map: equalizer setting                                
(x"68" , x"8e" , x"34"),    -- HDMI Map: equalizer setting                                
(x"68" , x"93" , x"8b"),    -- HDMI Map: equalizer setting                                
(x"68" , x"94" , x"2d"),    -- HDMI Map: equalizer setting, equalizer set in automatic mode
(x"68" , x"96" , x"01"),    -- HDMI Map: Enables equalizer dynamic mode. This configuration is recommended.
(x"68" , x"14" , x"1d"),    -- HDMI Map: Audio mute occurs if audio changes between any of the following PCM, DSD, HBR or DST formats, Audio mute occurs if the TMDS clock has irregular/missing pulses.

(x"44" , x"cf" , x"01"),    -- ?CP map: Power off macrovision?
(x"4c" , x"0c" , x"1f"),    -- ?CP map: Power off macrovision?
(x"4c" , x"12" , x"7b"),    -- ?CP map: Power off macrovision?

-- (x"4c" , x"c8" , x"40"),   -- CP map: ADV7604

(x"6c" , x"00" , x"00"),    -- EDID Map
(x"6c" , x"01" , x"ff"),
(x"6c" , x"02" , x"ff"),
(x"6c" , x"03" , x"ff"),
(x"6c" , x"04" , x"ff"),
(x"6c" , x"05" , x"ff"),
(x"6c" , x"06" , x"ff"),
(x"6c" , x"07" , x"00"),
(x"6c" , x"08" , x"06"),
(x"6c" , x"09" , x"96"),
(x"6c" , x"0a" , x"48"),
(x"6c" , x"0b" , x"44"),
(x"6c" , x"0c" , x"01"),
(x"6c" , x"0d" , x"00"),
(x"6c" , x"0e" , x"00"),
(x"6c" , x"0f" , x"00"),
(x"6c" , x"10" , x"25"),
(x"6c" , x"11" , x"10"),
(x"6c" , x"12" , x"01"),
(x"6c" , x"13" , x"03"),
(x"6c" , x"14" , x"80"),
(x"6c" , x"15" , x"31"),
(x"6c" , x"16" , x"1c"),
(x"6c" , x"17" , x"a0"),
(x"6c" , x"18" , x"1e"),
(x"6c" , x"19" , x"aa"),
(x"6c" , x"1a" , x"33"),
(x"6c" , x"1b" , x"a4"),
(x"6c" , x"1c" , x"55"),
(x"6c" , x"1d" , x"48"),
(x"6c" , x"1e" , x"93"),
(x"6c" , x"1f" , x"25"),
(x"6c" , x"20" , x"10"),
(x"6c" , x"21" , x"45"),
(x"6c" , x"22" , x"47"),
(x"6c" , x"23" , x"ff"),
(x"6c" , x"24" , x"ff"),
(x"6c" , x"25" , x"80"),
(x"6c" , x"26" , x"81"),
(x"6c" , x"27" , x"c0"),
(x"6c" , x"28" , x"81"),
(x"6c" , x"29" , x"99"),
(x"6c" , x"2a" , x"a9"),
(x"6c" , x"2b" , x"40"),
(x"6c" , x"2c" , x"61"),
(x"6c" , x"2d" , x"59"),
(x"6c" , x"2e" , x"45"),
(x"6c" , x"2f" , x"59"),
(x"6c" , x"30" , x"31"),
(x"6c" , x"31" , x"59"),
(x"6c" , x"32" , x"71"),
(x"6c" , x"33" , x"4a"),
(x"6c" , x"34" , x"81"),
(x"6c" , x"35" , x"40"),
(x"6c" , x"36" , x"01"),    -- EDID Detailed Timing Descriptions additional standard supported #1-0 : Pixel clock 74250000/10000-> 74.25MHz; 0x1D01 (byte1,byte0)                                                                                                                         
(x"6c" , x"37" , x"1D"),    -- EDID Detailed Timing Descriptions additional standard supported #1-1 : Pixel clock 74250000/10000-> 74.25MHz; 0x1D01 (byte1,byte0)                                                                                                                         
(x"6c" , x"38" , x"80"),    -- EDID Detailed Timing Descriptions additional standard supported #1-2 : 0x80=128decimal                                                                                                                                                                     
(x"6c" , x"39" , x"18"),    -- EDID Detailed Timing Descriptions additional standard supported #1-3 : 0x18=24decimal                                                                                                                                                                      
(x"6c" , x"3a" , x"71"),    -- EDID Detailed Timing Descriptions additional standard supported #1-4 : horizontal active ->0x780=D"1920"; horizontal blanking=0x118=280                                                                                                                    
(x"6c" , x"3b" , x"38"),    -- EDID Detailed Timing Descriptions additional standard supported #1-5 : Vertical active lower 8 bits = 0x38                                                                                                                                                 
(x"6c" , x"3c" , x"2d"),    -- EDID Detailed Timing Descriptions additional standard supported #1-6 : Vertical blanking lower 8 bits = 0x2D                                                                                                                                               
(x"6c" , x"3d" , x"40"),    -- EDID Detailed Timing Descriptions additional standard supported #1-7 : Vertical active -> 0x438=D"1080"; Vertical blanking=0x2D=D"45"; sync on rgb                                                                                                         
(x"6c" , x"3e" , x"46"),    -- EDID Detailed Timing Descriptions additional standard supported #1-8 : Horizontal sync offset lower 8 bits. 0x46= D"70"                                                                                                                                    
(x"6c" , x"3f" , x"28"),    -- EDID Detailed Timing Descriptions additional standard supported #1-9 : Horizontal sync pulse width lower 8 bits 0x28=D"40"                                                                                                                                 
(x"6c" , x"40" , x"55"),    -- EDID Detailed Timing Descriptions additional standard supported #1-10: Vertical Sync Offset lower 4 bits 0x5=D"5; Vertical  Sync Pulse Width lower 4 bits 0x5=D"5"                                                                                         
(x"6c" , x"41" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #1-11: 0x0                                                                                                                                                                                 
(x"6c" , x"42" , x"e8"),    -- EDID Detailed Timing Descriptions additional standard supported #1-12: horizontal image size, lower 8 bits 0xe8                                                                                                                                            
(x"6c" , x"43" , x"12"),    -- EDID Detailed Timing Descriptions additional standard supported #1-13: Vertical image size, lower 8 bits 0x12                                                                                                                                              
(x"6c" , x"44" , x"11"),    -- EDID Detailed Timing Descriptions additional standard supported #1-14: Horizontal image size uppest 4bits:0x1-> 0x1e8=D"488"[mm]; Vertical image size uppest 4bits 0x1-> 0x112=D"274"[mm]                                                                  
(x"6c" , x"45" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #1-15: Horizontal border                                                                                                                                                                   
(x"6c" , x"46" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #1-16: Vertical border                                                                                                                                                                     
(x"6c" , x"47" , x"18"),    -- EDID Detailed Timing Descriptions additional standard supported #1-17: Non-Interlcaed; Normal display, no stereo; digital separate                                                                                                                         
(x"6c" , x"48" , x"01"),    -- EDID Detailed Timing Descriptions additional standard supported #2-0 : Pixel clock 74250000/10000-> 74.25MHz; 0x1D01 (byte1,byte0)                                                                                                                         
(x"6c" , x"49" , x"1D"),    -- EDID Detailed Timing Descriptions additional standard supported #2-1 : Pixel clock 74250000/10000-> 74.25MHz; 0x1D01 (byte1,byte0)                                                                                                                         
(x"6c" , x"4a" , x"80"),    -- EDID Detailed Timing Descriptions additional standard supported #2-2 : 0x80=128decimal                                                                                                                                                                     
(x"6c" , x"4b" , x"d0"),    -- EDID Detailed Timing Descriptions additional standard supported #2-3 : 0xd0                                                                                                                                                                                
(x"6c" , x"4c" , x"72"),    -- EDID Detailed Timing Descriptions additional standard supported #2-4 : horizontal active ->0x780=D"1920"; horizontal blanking=0x2d0=720                                                                                                                    
(x"6c" , x"4d" , x"38"),    -- EDID Detailed Timing Descriptions additional standard supported #2-5 : Vertical active lower 8 bits = 0x38                                                                                                                                                 
(x"6c" , x"4e" , x"2d"),    -- EDID Detailed Timing Descriptions additional standard supported #2-6 : Vertical blanking lower 8 bits = 0x2D                                                                                                                                               
(x"6c" , x"4f" , x"40"),    -- EDID Detailed Timing Descriptions additional standard supported #2-7 : Vertical active -> 0x438=D"1080"; Vertical blanking=0x2D=D"45"; sync on rgb                                                                                                         
(x"6c" , x"50" , x"46"),    -- EDID Detailed Timing Descriptions additional standard supported #2-8 : Horizontal sync offset lower 8 bits. 0x46= D"70"                                                                                                                                    
(x"6c" , x"51" , x"28"),    -- EDID Detailed Timing Descriptions additional standard supported #2-9 : Horizontal sync pulse width lower 8 bits 0x28=D"40"                                                                                                                                 
(x"6c" , x"52" , x"55"),    -- EDID Detailed Timing Descriptions additional standard supported #2-10: Vertical Sync Offset lower 4 bits 0x5=D"5; Vertical  Sync Pulse Width lower 4 bits 0x5=D"5"                                                                                         
(x"6c" , x"53" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #2-11: 0x0                                                                                                                                                                                 
(x"6c" , x"54" , x"e8"),    -- EDID Detailed Timing Descriptions additional standard supported #2-12: horizontal image size, lower 8 bits 0xe8                                                                                                                                            
(x"6c" , x"55" , x"12"),    -- EDID Detailed Timing Descriptions additional standard supported #2-13: Vertical image size, lower 8 bits 0x12                                                                                                                                              
(x"6c" , x"56" , x"11"),    -- EDID Detailed Timing Descriptions additional standard supported #2-14: Horizontal image size uppest 4bits:0x1-> 0x1e8=D"488"[mm]; Vertical image size uppest 4bits 0x1-> 0x112=D"274"[mm]                                                                  
(x"6c" , x"57" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #2-15: Horizontal border                                                                                                                                                                   
(x"6c" , x"58" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #2-16: Vertical border                                                                                                                                                                     
(x"6c" , x"59" , x"18"),    -- EDID Detailed Timing Descriptions additional standard supported #2-17: Non-Interlcaed; Normal display, no stereo; digital separate                                                                                                                         
(x"6c" , x"5a" , x"01"),    -- EDID Detailed Timing Descriptions additional standard supported #3-0 : Pixel clock 74250000/10000-> 74.25MHz; 0x1D01 (byte1,byte0)                                                                                                                         
(x"6c" , x"5b" , x"1D"),    -- EDID Detailed Timing Descriptions additional standard supported #3-1 : Pixel clock 74250000/10000-> 74.25MHz; 0x1D01 (byte1,byte0)                                                                                                                         
(x"6c" , x"5c" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #3-2 : 0x00                                                                                                                                                                                
(x"6c" , x"5d" , x"bc"),    -- EDID Detailed Timing Descriptions additional standard supported #3-3 : 0xbc                                                                                                                                                                                
(x"6c" , x"5e" , x"52"),    -- EDID Detailed Timing Descriptions additional standard supported #3-4 : horizontal active ->0x500=D"1280"; horizontal blanking=0x2bc=700                                                                                                                    
(x"6c" , x"5f" , x"D0"),    -- EDID Detailed Timing Descriptions additional standard supported #3-5 : Vertical active lower 8 bits = 0xD0                                                                                                                                                 
(x"6c" , x"60" , x"1e"),    -- EDID Detailed Timing Descriptions additional standard supported #3-6 : Vertical blanking lower 8 bits = 0x1e                                                                                                                                               
(x"6c" , x"61" , x"20"),    -- EDID Detailed Timing Descriptions additional standard supported #3-7 : Vertical active -> 0x2D0=D"720"; Vertical blanking=0x1E=D"30"; sync on rgb                                                                                                          
(x"6c" , x"62" , x"46"),    -- EDID Detailed Timing Descriptions additional standard supported #3-8 : Horizontal sync offset lower 8 bits. 0x46= D"70"                                                                                                                                    
(x"6c" , x"63" , x"28"),    -- EDID Detailed Timing Descriptions additional standard supported #3-9 : Horizontal sync pulse width lower 8 bits 0x28=D"40"                                                                                                                                 
(x"6c" , x"64" , x"55"),    -- EDID Detailed Timing Descriptions additional standard supported #3-10: Vertical Sync Offset lower 4 bits 0x5=D"5; Vertical  Sync Pulse Width lower 4 bits 0x5=D"5"                                                                                         
(x"6c" , x"65" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #3-11: 0x0                                                                                                                                                                                 
(x"6c" , x"66" , x"e8"),    -- EDID Detailed Timing Descriptions additional standard supported #3-12: horizontal image size, lower 8 bits 0xe8                                                                                                                                            
(x"6c" , x"67" , x"12"),    -- EDID Detailed Timing Descriptions additional standard supported #3-13: Vertical image size, lower 8 bits 0x12                                                                                                                                              
(x"6c" , x"68" , x"11"),    -- EDID Detailed Timing Descriptions additional standard supported #3-14: Horizontal image size uppest 4bits:0x1-> 0x1e8=D"488"[mm]; Vertical image size uppest 4bits 0x1-> 0x112=D"274"[mm]                                                                  
(x"6c" , x"69" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #3-15: Horizontal border                                                                                                                                                                   
(x"6c" , x"6a" , x"00"),    -- EDID Detailed Timing Descriptions additional standard supported #3-16: Vertical border                                                                                                                                                                     
(x"6c" , x"6b" , x"18"),    -- EDID Detailed Timing Descriptions additional standard supported #3-17: Non-Interlcaed; Normal display, no stereo; digital separate(x"6c" , x"5a" , x"00"),                                                                                                 
(x"6c" , x"6c" , x"00"),
(x"6c" , x"6d" , x"00"),
(x"6c" , x"6e" , x"00"),
(x"6c" , x"6f" , x"fd"),
(x"6c" , x"70" , x"00"),
(x"6c" , x"71" , x"1d"),
(x"6c" , x"72" , x"56"),
(x"6c" , x"73" , x"0f"),
(x"6c" , x"74" , x"6f"),
(x"6c" , x"75" , x"11"),
(x"6c" , x"76" , x"00"),
(x"6c" , x"77" , x"0a"),
(x"6c" , x"78" , x"20"),
(x"6c" , x"79" , x"20"),
(x"6c" , x"7a" , x"20"),
(x"6c" , x"7b" , x"20"),
(x"6c" , x"7c" , x"20"),
(x"6c" , x"7d" , x"20"),
(x"6c" , x"7e" , x"01"),
(x"6c" , x"7f" , x"80"),
(x"6c" , x"80" , x"02"),
(x"6c" , x"81" , x"03"),
(x"6c" , x"82" , x"11"),
(x"6c" , x"83" , x"00"),
(x"6c" , x"84" , x"E2"),
(x"6c" , x"85" , x"00"),
(x"6c" , x"86" , x"40"),
(x"6c" , x"87" , x"65"),
(x"6c" , x"88" , x"03"),
(x"6c" , x"89" , x"0C"),
(x"6c" , x"8a" , x"00"),
(x"6c" , x"8b" , x"36"),
(x"6c" , x"8c" , x"61"),
(x"6c" , x"8d" , x"E3"),
(x"6c" , x"8e" , x"05"),
(x"6c" , x"8f" , x"00"),
(x"6c" , x"90" , x"00"),
(x"6c" , x"91" , x"00"),
(x"6c" , x"92" , x"00"),
(x"6c" , x"93" , x"00"),
(x"6c" , x"94" , x"00"),
(x"6c" , x"95" , x"00"),
(x"6c" , x"96" , x"00"),
(x"6c" , x"97" , x"00"),
(x"6c" , x"98" , x"00"),
(x"6c" , x"99" , x"00"),
(x"6c" , x"9a" , x"00"),
(x"6c" , x"9b" , x"00"),
(x"6c" , x"9c" , x"00"),
(x"6c" , x"9d" , x"00"),
(x"6c" , x"9e" , x"00"),
(x"6c" , x"9f" , x"00"),
(x"6c" , x"a0" , x"00"),
(x"6c" , x"a1" , x"00"),
(x"6c" , x"a2" , x"00"),
(x"6c" , x"a3" , x"00"),
(x"6c" , x"a4" , x"00"),
(x"6c" , x"a5" , x"00"),
(x"6c" , x"a6" , x"00"),
(x"6c" , x"a7" , x"00"),
(x"6c" , x"a8" , x"00"),
(x"6c" , x"a9" , x"00"),
(x"6c" , x"aa" , x"00"),
(x"6c" , x"ab" , x"00"),
(x"6c" , x"ac" , x"00"),
(x"6c" , x"ad" , x"00"),
(x"6c" , x"ae" , x"00"),
(x"6c" , x"af" , x"00"),
(x"6c" , x"b0" , x"00"),
(x"6c" , x"b1" , x"00"),
(x"6c" , x"b2" , x"00"),
(x"6c" , x"b3" , x"00"),
(x"6c" , x"b4" , x"00"),
(x"6c" , x"b5" , x"00"),
(x"6c" , x"b6" , x"00"),
(x"6c" , x"b7" , x"00"),
(x"6c" , x"b8" , x"00"),
(x"6c" , x"b9" , x"00"),
(x"6c" , x"ba" , x"00"),
(x"6c" , x"bb" , x"00"),
(x"6c" , x"bc" , x"00"),
(x"6c" , x"bd" , x"00"),
(x"6c" , x"be" , x"00"),
(x"6c" , x"bf" , x"00"),
(x"6c" , x"c0" , x"00"),
(x"6c" , x"c1" , x"00"),
(x"6c" , x"c2" , x"00"),
(x"6c" , x"c3" , x"00"),
(x"6c" , x"c4" , x"00"),
(x"6c" , x"c5" , x"00"),
(x"6c" , x"c6" , x"00"),
(x"6c" , x"c7" , x"00"),
(x"6c" , x"c8" , x"00"),
(x"6c" , x"c9" , x"00"),
(x"6c" , x"ca" , x"00"),
(x"6c" , x"cb" , x"00"),
(x"6c" , x"cc" , x"00"),
(x"6c" , x"cd" , x"00"),
(x"6c" , x"ce" , x"00"),
(x"6c" , x"cf" , x"00"),
(x"6c" , x"d0" , x"00"),
(x"6c" , x"d1" , x"00"),
(x"6c" , x"d2" , x"00"),
(x"6c" , x"d3" , x"00"),
(x"6c" , x"d4" , x"00"),
(x"6c" , x"d5" , x"00"),
(x"6c" , x"d6" , x"00"),
(x"6c" , x"d7" , x"00"),
(x"6c" , x"d8" , x"00"),
(x"6c" , x"d9" , x"00"),
(x"6c" , x"da" , x"00"),
(x"6c" , x"db" , x"00"),
(x"6c" , x"dc" , x"00"),
(x"6c" , x"dd" , x"00"),
(x"6c" , x"de" , x"00"),
(x"6c" , x"df" , x"00"),
(x"6c" , x"e0" , x"00"),
(x"6c" , x"e1" , x"00"),
(x"6c" , x"e2" , x"00"),
(x"6c" , x"e3" , x"00"),
(x"6c" , x"e4" , x"00"),
(x"6c" , x"e5" , x"00"),
(x"6c" , x"e6" , x"00"),
(x"6c" , x"e7" , x"00"),
(x"6c" , x"e8" , x"00"),
(x"6c" , x"e9" , x"00"),
(x"6c" , x"ea" , x"00"),
(x"6c" , x"eb" , x"00"),
(x"6c" , x"ec" , x"00"),
(x"6c" , x"ed" , x"00"),
(x"6c" , x"ee" , x"00"),
(x"6c" , x"ef" , x"00"),
(x"6c" , x"f0" , x"00"),
(x"6c" , x"f1" , x"00"),
(x"6c" , x"f2" , x"00"),
(x"6c" , x"f3" , x"00"),
(x"6c" , x"f4" , x"00"),
(x"6c" , x"f5" , x"00"),
(x"6c" , x"f6" , x"00"),
(x"6c" , x"f7" , x"00"),
(x"6c" , x"f8" , x"00"),
(x"6c" , x"f9" , x"00"),
(x"6c" , x"fa" , x"00"),
(x"6c" , x"fb" , x"00"),
(x"6c" , x"fc" , x"00"),
(x"6c" , x"fd" , x"00"),
(x"6c" , x"fe" , x"00"),
(x"6c" , x"ff" , x"D5"),
(x"64" , x"71" , x"4f"),    -- Repeaster Map: ksv_list Not Ready,
(x"64" , x"74" , x"01"),    -- Repeater Map:  EDID A
(x"64" , x"7a" , x"00"),    -- Repeaster Map: Automatic enable of internal E-EDID on HDMI ports when the part comes out of powerdown mode 0, Segment pointer for internal EDID in main i2c lsb

(x"98" , x"00" , x"1e"),
(x"98" , x"01" , x"25"),
(x"98" , x"02" , x"fc"),    -- F = HDMI mode, input color space depends on color space reported by HDMI block : 4 = limited output range (16 to 235); c = Full Range (0 to 256) 
(x"98" , x"03" , x"8A"),    -- 24-bit SDR ITU-R 4:2:2 Mode 2                                                                                                                              
(x"98" , x"04" , x"62"),
(x"98" , x"05" , x"2c"),
(x"98" , x"06" , x"a6"),
(x"98" , x"15" , x"a0"),
(x"44" , x"00" , x"00"),
(x"4c" , x"00" , x"ff"),
(x"4c" , x"01" , x"fe"),    -- AFE map. power down ref buffer/bandgap/clamps/sync strippers/input mux/output buffer
(x"68" , x"01" , x"00"),
(x"68" , x"0d" , x"84"),
(x"68" , x"1a" , x"4a"),
(x"68" , x"48" , x"46"),
(x"68" , x"1e" , x"4a")