4:2:2 8bit ycrcb

Hi,

 When the ADV7612 pixel output format is set to 4:2:2 (refer to the Pixel Port Output Modes section), the DPP section down converts the 4:4:4 stream from the HDMI section according to DS_WITHOUT_FILTER
For a 4:4:4 HDMI input stream to the ADV7612
  The DPP section filters and downsamples the video data from 4:4:4 to 4:2:2 format if DS_WITHOUT_FILTER is set to 0. The DPP section only downsamples, without filtering, the video data from the HDMI section if DS_WITHOUT_FILTER is set to 1.
For a 4:2:2 HDMI input stream, the functionality of DS_WITHOUT_FILTER is reversed.  
This inversion ensures that for a 4:2:2 HDMI input stream no filtering will be applied if DS_WITHOUT_FILTER is left to its
default value 0. When a 4:2:2 HDMI input stream is input to the
ADV7612, the DPP section downsamples, without filtering, the video data from 4:4:4 to 4:2:2 format if DS_WITHOUT_FILTER is set to 0. If DS_WITHOUT_FILTER is set to 1, the DPP filters and downsamples the video data from 4:4:4 to 4:2:2 format.

And also make sure the sink is interpreting what the ADV7612 is outputting.  Make sure the sink has the correct bus / pin alignment when 422 mode. 422 mode only uses 16 pins instead of 24.Please refer here ez.analog.com/.../25645
 The incoming HDMI can be either RGB 444 or YCbCr 444/422.  It converts the it to 444 internally for processing then converts it again to the output format, either 444 or 422
422 implies there is one luminance output per input sample with the color information interleaved in the data stream with the output clock doubled.  422 also implies there is one color sample per 2 luminance sample.  The color information is subsampled.  RGB can not be output in 422 format.  Check out en.wikipedia.org/.../4:2:2 for a better description of this format.

Thanks,

Poornima

Thanks for the response.  https://ez.analog.com/video/f/qa/5442/adv7612-problems-with-hdmi-ycbcr-4-2-2-input/25645  it seems that his question hasn't been solved.

I only want to know how to configure the registers. 

Hi,

 Could you please your register dump on this?

Thanks,

Poornima

Hi,

  Have you configure the CSC register?

  Have you verified the 4:2:2 Output mode in Pixel Output formats. Refer Page198 in ADV7612 Reference Manual.
  And also Refer to the DLL settings for 656, 8-/10-/12-bit modes in the DLL on LLC Clock Path section. Refer Page 29.
  And crosscheck with OP_CH_SEL[2:0] register for corresponding pin configuration.

Thanks,

Poornima

Hi,

i didn't configure the CSC register.

 I Analyzed the data from ADV7612 with a logic analizer,and  the data is correct. So I think the problem is 7511, not 7612.

Thanks,

Heven

Hi,

i didn't configure the CSC register.

 I Analyzed the data from ADV7612 with a logic analizer,and  the data is correct. So I think the problem is 7511, not 7612.

Thanks,

Heven

Hi,

Please refer https://ez.analog.com/video/w/documents/797/advantiv-eval-adv7612-7511-video-evaluation-board

Note: The Y1Y0 bits (0x55[6:5]), which tell the sink whether YCbCr 4:2:2,4:4:4 or RGB are sent. Refer Page60 in ADV7511W programming guide.
          The ADV7511W can up-convert from 4:2:2 format to 4:4:4 format as well as down-convert from 4:4:4 to 4:2:2. To convert from 4:4:4 to 4:2:2, the video data always goes through a filter first to remove any artificial down-sampling noise.
          The ADV7511W accepts video data from as few as eight pins (YCbCr 4:2:2 with 2x pixel clock) or as many as 24 pins (RGB 4:4:4 or YCbCr 4:4:4). In addition it accepts HSYNC,VSYNC and DE (Data Enable). Refer Page26 in ADV7511W programming guide. 

 The ADV7511 and ADV7511W are the same die, just different pin outs.  The software should be the same except the ADV7511W has a reduced set of options that will work.

Thanks,

Poornima

I've solved the problem.

Thanks a lot.