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ADV7181B video decoder-facing color issue

Hi ,

Im working on PAL to VGA conversion, Im using  adv7181 Multi-format SDTV video decoder. Im facing  color problem (getting only black and white display)

Im capturing the picture though camera and  this PAL video is given to adv7181b,Im getting  VGA display without color.

is there any color related register configuration i need to do to solve this color issue ?

  

Can u please help me to resolve this issue.

Thanks

FPGA Engineer

  • Here's a script file that will initialize the part for different modes, specifically look at "##CP 525p/625p##".  Write to address 42 are writes to the ADV7181

    Also note that PAL is an interlaced format, VGA is progressive,  The ADV7181 will not convert PAL to VGA

  • Hi ,

    Thanks for the reply .

    Actually we are using FPGA in this project and whatever output coming from ADV7181B video decoder is input to FPGA and we will convert interlaced format to prograssive.

    We initialized the video decoder as per attached file and i compared it with the file you sent (ADV7181C_ADV7181C@_ADV7341-VER.3.2c Refered "##CP 525p/625p##"). Wherever mismatch found, i made it as per in your file.

    But there is no improvement in color.

    Note :  If we use test pattern (Color Bars)  instead of vedio decoder input,We will get proper color display. So there is no problem with FPGA as i think.

    Please kindly help me to solve the issue.

    Thanks & Regards

    Preeti

  • Hi ,

    Thanks for the reply .

    Actually we are using FPGA in this project and whatever output coming from ADV7181B video decoder is input to FPGA and we will convert interlaced format to prograssive.

    We initialized the video decoder as per attached file and i compared it with the file you sent (ADV7181C_ADV7181C@_ADV7341-VER.3.2c Refered "##CP 525p/625p##"). Wherever mismatch found, i made it as per in your file.

    But there is no improvement in color.

    Note :  If we use test pattern (Color Bars)  instead of vedio decoder input,We will get proper color display. So there is no problem with FPGA as i think.

    Please kindly help me to solve the issue.

    Thanks & Regards

    Preeti

  • 1) Is there >2ms wait after 0F <- 01 write; the reset pulse

    2) Have you tried other VID_SEL values in case your source is not what you expect, like 00

    3) Do you see the signals transition on the YCbCr digital channels

    4) Make sure VID_STD & PRIM_MODE are correct, write 05 <- 00, 06 <- 02

    5) 3A <- 17, you can power down ADC3 also, probably bug in script but it doesn't hurt anything

    6) is the input PAL signal the right amplitude, if the color burst is too low then it will not have color

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    EZ Admin