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The color burst from AD723 seems to move on AD723 Eval Board.

Thread Summary

The user inquired about the variability of the color burst start point on the AD723 Eval Board (AD723EB rev.B). The engineer confirmed that the maximum phase error due to asynchronous operation is one cycle of 4FSC (90 degrees at 3.579545 MHz), and variations due to temperature, process, and voltage are negligible. The user should focus on the accuracy of the external 4FSC oscillator (14.318180 MHz) for assessing the burst start point variation.
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Hello,

I have questions about AD723.
The start point of color burst from AD723 seems to move on AD723 Eval Board (AD723EB rev.B).
Could you see attached file "Color_burst_AD723_rev01.xlsx" for more detail?

Thank you!

Best regards.
Tamu

Color_burst_AD723_rev01.xlsx
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  • Hi Tamu,

    I don't have the schematic that shows exactly how the colorburst is gated.  The block diagram you attached is very high-level and essentially shows pictorially what is described by the phrase in my earlier reply that you quoted, so I'm not sure what you are asking.  The same description is given in the data sheet.

    The fact remains that the Hsync and 4FSC signals are asynchronous.  The counter that is clocked by 4FSC is enabled when the falling edge of the Hsync pulse reaches its nominal midpoint, but the phase of the 4FSC clock is indeterminate at that point in time because it is not synchronous with the Hsync signal.  The 4FSC phase could, therefore, be anything between 0 and 2pi when the counter is enabled.  This is where the ambiguity comes from, which amounts to 90 degrees at the colorburst frequency.  The phase of the colorburst will change by the same amount each time it is inserted because the Hsync signal and 4FSC signal are cycle-slipping relative to each other at a constant rate.  (If you put the two asynchronous signals on a scope and triggered on one, the other would be seen to slip past the one that the scope is triggered on.)  This is the main source of the phase ambiguity.  Propagation delays will introduce a fixed time shift, but the variations, or deltas, will be due to the cycle-slipping.  Any variations with temperature will be small enough to ignore.

    Best regards.

    --Jonathan

Reply
  • Hi Tamu,

    I don't have the schematic that shows exactly how the colorburst is gated.  The block diagram you attached is very high-level and essentially shows pictorially what is described by the phrase in my earlier reply that you quoted, so I'm not sure what you are asking.  The same description is given in the data sheet.

    The fact remains that the Hsync and 4FSC signals are asynchronous.  The counter that is clocked by 4FSC is enabled when the falling edge of the Hsync pulse reaches its nominal midpoint, but the phase of the 4FSC clock is indeterminate at that point in time because it is not synchronous with the Hsync signal.  The 4FSC phase could, therefore, be anything between 0 and 2pi when the counter is enabled.  This is where the ambiguity comes from, which amounts to 90 degrees at the colorburst frequency.  The phase of the colorburst will change by the same amount each time it is inserted because the Hsync signal and 4FSC signal are cycle-slipping relative to each other at a constant rate.  (If you put the two asynchronous signals on a scope and triggered on one, the other would be seen to slip past the one that the scope is triggered on.)  This is the main source of the phase ambiguity.  Propagation delays will introduce a fixed time shift, but the variations, or deltas, will be due to the cycle-slipping.  Any variations with temperature will be small enough to ignore.

    Best regards.

    --Jonathan

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