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The color burst from AD723 seems to move on AD723 Eval Board.

Thread Summary

The user inquired about the variability of the color burst start point on the AD723 Eval Board (AD723EB rev.B). The engineer confirmed that the maximum phase error due to asynchronous operation is one cycle of 4FSC (90 degrees at 3.579545 MHz), and variations due to temperature, process, and voltage are negligible. The user should focus on the accuracy of the external 4FSC oscillator (14.318180 MHz) for assessing the burst start point variation.
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Hello,

I have questions about AD723.
The start point of color burst from AD723 seems to move on AD723 Eval Board (AD723EB rev.B).
Could you see attached file "Color_burst_AD723_rev01.xlsx" for more detail?

Thank you!

Best regards.
Tamu

Color_burst_AD723_rev01.xlsx
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  • Hi Jonathan,

    Thank you for your reply.

    I'm so sorry for many questions.

    Question 1.

    About your following comment,

    >The colorburst gating signal is generated after counting 4FSC cycles following the falling edge of the Hsync pulse,

    I'd like to know the schematic for color burst insertion.

    Please refer attached file "Color_burst_insertion_logic.pptx".

    Question 2.

    Let me confirm about your following comment.

    >the greatest phase error would be one cycle of 4FSC, or 90 degrees at 3.579545 MHz.

    We'd like to know the accuracy of the phase error.

    May we consider only variations of external OSC generating 14.318180 MHz?

    Is there possibility that the phase error is more than one 4FSC depends on variations of the color burst insert logic in AD723?

    Thank you!

    Best regards.

    Tamu

    Color_burst_insertion_logic.pptx
Reply
  • Hi Jonathan,

    Thank you for your reply.

    I'm so sorry for many questions.

    Question 1.

    About your following comment,

    >The colorburst gating signal is generated after counting 4FSC cycles following the falling edge of the Hsync pulse,

    I'd like to know the schematic for color burst insertion.

    Please refer attached file "Color_burst_insertion_logic.pptx".

    Question 2.

    Let me confirm about your following comment.

    >the greatest phase error would be one cycle of 4FSC, or 90 degrees at 3.579545 MHz.

    We'd like to know the accuracy of the phase error.

    May we consider only variations of external OSC generating 14.318180 MHz?

    Is there possibility that the phase error is more than one 4FSC depends on variations of the color burst insert logic in AD723?

    Thank you!

    Best regards.

    Tamu

    Color_burst_insertion_logic.pptx
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