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ADV7612 16BIT SDR

i want the adv7612 output 16bit YCbCr with vsync ,hsync and de.

I sellect 16BIT SDR ITU-BT-656 Mode 0 with set the value  98,03, 80

the regs value setting :

98 ,00, 02,

98,01, 06,

98,02, F5,
98, 03, 80,
98, 04, 62,
98, 05, 29,
98, 06, A6,
98, 0B, 44,
98, 0C, 42,
98,14, 7F,
98,15, 80,
98,19, 83,
98,33, 40,

44,BA, 01,

64,40,81

68 9B 03 ; ADI recommended setting

68 00 08 ; Set HDMI Input Port A (BG_MEAS_PORT_SEL = 001b)

68 02 03 ; Enable Ports A & B in background mode

68 83 FC ; Enable clock terminators for port A & B

68 6F 0C ; ADI recommended setting

68 85 1F ; ADI recommended setting

68 87 70 ; ADI recommended setting

68 8D 04 ; LFG Port A

68 8E 1E ; HFG Port A

68 1A 8A ; unmute audio

68 57 DA ; ADI recommended setting

68 58 01 ; ADI recommended setting

68 75 10 ; DDC drive strength

68 90 04 ; LFG Port B

68 91 1E ; HFG Port B

when i change the Resolution to 1920*1080, there display,but a litter time ,it disapper,

is there any problem with regs setting .

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  • thanks for you reply.

    i am not using eval board.

    there are right pixel bus connect as show in UG-216 Table 77 on my custom board, i set the LLC DLL phase like this 98,14,7F;98,19,83;

    i using the Tektronix to measure the LLC and Hsync ,Vsync.they are all correct,

    the test source come from the PC's displayport

    when i change the resolution of the source ,it can display a picture,but if i don't change the resolution ,there is no response.

Reply
  • thanks for you reply.

    i am not using eval board.

    there are right pixel bus connect as show in UG-216 Table 77 on my custom board, i set the LLC DLL phase like this 98,14,7F;98,19,83;

    i using the Tektronix to measure the LLC and Hsync ,Vsync.they are all correct,

    the test source come from the PC's displayport

    when i change the resolution of the source ,it can display a picture,but if i don't change the resolution ,there is no response.

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