This post applies to the ADV7280, ADV7280-M, ADV7282, ADV7282-M and ADV7283.
The deinterlacer block (I2P) is designed to have a minimum amount of latency between input and output (max latency is about 5 lines of video ~ 85 ms). This is important for automotive applications. Due to this it uses a line based deinterlacer algorithm to interpolate between lines to generate the missing lines e.g. in odd fields it interpolates between lines 1 and 3 to generate line 2.
Note that an analog devices proprietary algorithm is used to smooth the picture to reduce the effect of low angle line artifacts (jaggies). However such artifacts can still occur.
If you wish to have output video without deinterlacer artifacts, I advise using a decoder that used a frame based deinterlacer. This will add significant latency and cost to your system. The ADV7186 or ADV7850 can perform this frame based deinterlacer.
Vpp Map register 0x5A bits [4:3] control the I2P mode of the ADV728x.
By default these bits are 0b'11. This produces the ADI propritery deinterlacer algorithm. I strongly advice useing this mode for all applications.
Setting these bits to the value 0b'00 will force the deinterlacer to perform a simple line doubling algorithm. This will result in alot of flicker noise and 'jaggies' noise.
Note if you are trying to remove every second line to try and recreate an interlaced video, then you could get confused between even and odd fields (this is because no even/odd field information is output in progressive mode). When you combine the fields togethter you could create a 2 line offset. i.e. you could place line 2 above line 1. The only workaround I can think of for the analog video source to insert field numbers in the vertical blanking interval. The ADV728x will then pass this information as ancillary data packets.
Senior Applications Engineer.
Thanks Rob for taking the time to help me. That is exactly the answer I was looking for. Noted about the flicker issue.