How do I increase the sample rate beyond 2.5M samples/sec? I modified the ad9361-iiostream.c exmample to change the RX center frequency, bandwidth, and sample rate. However, when I subsequently run iio_info, I see that all the attributes indeed changed, except for the sample rate, which stayed 2.5M even though I specified a sample rate of 8M.
Also, I see in iio_info that the only available sample rates appear to be 2.5M and 312.5k (see below).
I ran both the example and iio_info on Windows, but I get the same output when I run iio_info on the serial console. So this does not appear to be a USB issue.
Is there a way to increase the bandwidth to 8M? The wiki says that the device itself supports up to 61.44M and a 20MHz bandwidth.
iio:device4: cf-ad9361-lpc (buffer capable) 2 channels found: voltage0: (input, index: 0, format: le:S12/16>>0) 5 channel-specific attributes found: attr 0: calibphase value: 0.000000 attr 1: calibscale value: 1.000000 attr 2: calibbias value: 0 attr 3: sampling_frequency value: 2500000 attr 4: sampling_frequency_available value: 2500000 312500 voltage1: (input, index: 1, format: le:S12/16>>0) 5 channel-specific attributes found: attr 0: calibbias value: 0 attr 1: calibphase value: 0.000000 attr 2: calibscale value: 1.000000 attr 3: sampling_frequency value: 2500000 attr 4: sampling_frequency_available value: 2500000 312500
You need to set the sample / baseband rate at the ad9361-phy device.
Please see here: AD9361/3/4 Linux Driver
The cf-ad9361-lpc is the HDL capture CORE driver / device. It controls an additional decimate by 8 filter, which can be added on top.
Thanks Michael. I understand the driver's documentation, which is indeed very helpful, except that I did not find what are the permissible divisor and decimation rates.
When I try to set the tx_path_rates and rx_path_rates on the ad9361-phy, I get an error -13 (iio_strerror return "Unknown error") and the rates do not change.
outlen = iio_device_attr_write(dev, "rx_path_rates", "BBPLL:960000001 ADC:30000000 R2:10000000 R1:10000000 RF:10000000 RXSAMP:10000000");
The same happened when I specified 960M, 32M, 16M, 8M, 8M, 8M.
The example code actually retrieves the phy device several times, and when I ran attr_write on each device handle returned, one of them did move to a sample rate of 8M, and it also modified the other rates I gave and decided on a PLL frequency of 1024MHz. This is fine (that the device is deciding how to sample and decimate), but I still do not understand how to modify the rate without getting an error.
I also do not understand whether the program only needs one handle to the phy device (it seems to work fine with only one) and if so, why it was retrieved several times. If it's because there is no harm in this, that's okay of course.
Yes - you load the filter - once enabled you can set lower baseband rates.
Yes - there are examples - in fact there is even a library for it: libad9361-iio
Please see here:
You can use ad9361_set_bb_rate() and it allows you to go down to 520 KHz (25MHz/48) by loading some wideband off the shelf filters.
Ideally you use the MATLAB Filter Design Wizard for AD9361 to design your ideal filter.
Or you use the AD936x_LP_* filters from here.
see basic example here: Controlling the transceiver and transferring data
Once the filter is loaded and enabled - you don't need to do anything.
Just set the sampling_frequency attribute.
Without FIR the min sampling_frequency is 25/12 MSPS.
With an interpolate/decimate by 2 it is 25/24 MSPS.
And with an interpolate/decimate by 4 it is 25/48 MSPS.
I should also mention that on PlutoSDR there is an additional interpolate/decimate by 8 inside our HDL core, which is controlled via the cf-ad9361-lpc and cf-ad9361-dds-core-lpc devices.
If you want to play with the HW and its capabilities I recommend to use the IIO OSC application with the AD936x Plugins to test and evaluate things.